原本是用M3内核的030,现在用AT32F421替换了。程序设计是TMR1_ETR用于触发(TMR1_CH2的PWM输出Reset),在代码移植后调试过程中定时器TMR1_ETR没有触发到输出PWM的Reset,请问是不是漏配置了哪些?void TIME1GPIO_Configuration(void)
{
GPIO_InitType GPIO_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_GPIOA, ENABLE );
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_InitStructure.GPIO_OutType = GPIO_OutType_PP;
GPIO_InitStructure.GPIO_Pull = GPIO_Pull_NOPULL ;
/*PA9 = TIM1 Channel 2*/
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_9;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA,GPIO_PinsSource9,GPIO_AF_2);
/*PA0 = TIM1 ETR*/
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA,GPIO_PinsSource0,GPIO_AF_2);
}
/*TIMER配置*/
void TIM1_Config(void)
{
TMR_OCInitType TIM_OCInitStructure;
TMR_TimerBaseInitType TIM_TimeBaseStructure;
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_TMR1, ENABLE);
TIME1GPIO_Configuration();
//100 8000000/800/100
/* Time Base configuration */
TIM_TimeBaseStructure.TMR_DIV = 800-1;
TIM_TimeBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up;
TIM_TimeBaseStructure.TMR_Period = 100-1;
TIM_TimeBaseStructure.TMR_ClockDivision = 0;
TIM_TimeBaseStructure.TMR_RepetitionCounter = 0;
TMR_TimeBaseInit(TMR1, &TIM_TimeBaseStructure);
/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TMR_OCMode = TMR_OCMode_PWM1;
TIM_OCInitStructure.TMR_OutputState = TMR_OutputState_Enable;
TIM_OCInitStructure.TMR_OutputNState = TMR_OutputNState_Enable;
TIM_OCInitStructure.TMR_OCPolarity = TMR_OCPolarity_Low;
TIM_OCInitStructure.TMR_OCNPolarity = TMR_OCNPolarity_Low;
TIM_OCInitStructure.TMR_OCIdleState = TMR_OCIdleState_Set;
TIM_OCInitStructure.TMR_OCNIdleState = TMR_OCIdleState_Reset;
TIM_OCInitStructure.TMR_Pulse = 0;
TMR_OC2PreloadConfig(TMR1,TMR_OCPreload_Enable);
TMR_OC2Init(TMR1, &TIM_OCInitStructure);
// TMR_ETRClockMode2Config(TMR1, TMR_ExtTRGDIV_OFF, TMR_ExtTRGPolarity_NonInverted, 0);
TMR_SelectInputTrigger(TMR1,TMR_TRGSEL_ETRF);
TMR_SelectSlaveMode(TMR1,TMR_SlaveMode_Reset);
// TMR1->SMC &= ~(1<<14);
// TMR1->SMC |= (1<<14);
// TMR_SelectMasterSlaveMode(TMR1, TMR_MasterSlaveMode_Enable);
TMR_OC2PreloadConfig(TMR1, TMR_OCPreload_Enable);
TMR_ARPreloadConfig(TMR1, ENABLE);
/* TIM enable counter */
TMR_Cmd(TMR1, ENABLE);
TMR_CtrlPWMOutputs(TMR1, ENABLE);
TMR_SetCompare2(TMR1,50);
}
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