void USART_Configuration(uint8_t no)
{
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStruct;
//#if PRINT_EN
RCC_AHB1PeriphClockCmd(Open_USART_TX_GPIO_CLK,ENABLE);
RCC_AHB1PeriphClockCmd(Open_USART_RX_GPIO_CLK,ENABLE);
#if (USARTx_OPEN == 1 || USARTx_OPEN == 6)
RCC_APB2PeriphClockCmd(Open_USART_CLK,ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA2, DISABLE);
#elif (USARTx_OPEN == 2 || USARTx_OPEN == 3 || USARTx_OPEN == 4 || USARTx_OPEN == 5)
RCC_APB1PeriphClockCmd(Open_USART_CLK,ENABLE);
#endif
GPIO_PinAFConfig(Open_USART_TX_GPIO_PORT, Open_USART_TX_SOURCE, Open_USART_TX_AF);
GPIO_PinAFConfig(Open_USART_RX_GPIO_PORT, Open_USART_RX_SOURCE, Open_USART_RX_AF);
/*
* Open_USART_TX -> PA9 , Open_USART_RX -PA10
*/
GPIO_InitStructure.GPIO_Pin = Open_USART_TX_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(Open_USART_TX_GPIO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = Open_USART_RX_PIN;
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(Open_USART_RX_GPIO_PORT, &GPIO_InitStructure);
/*
USARTx configured as follow:
- BaudRate = 115200 baud
- Word Length = 8 Bits
- One Stop Bit
- No parity
- Hardware flow control disabled (RTS and CTS signals)
- Receive and transmit
*/
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(Open_USART, &USART_InitStructure);
/* Enable the Open_USART Transmit interrupt: this interrupt is generated when the
Open_USART transmit data register is empty */
(USART_DMAy_Streamx[no-1], DISABLE);
//Check if the DMA Stream has been effectively disabled.
while (DMA_GetCmdStatus(USART_DMAy_Streamx[no-1]) != DISABLE);
//init DMA channel
DMA_StructInit(&DMA_InitStruct);
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&USART_PORT[no-1]->DR;
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART_RxBuffer[no-1][0];
DMA_InitStruct.DMA_BufferSize = USART_MAX_BUF_LEN;
DMA_InitStruct.DMA_Channel = USART_DMA_CHAN[no-1];
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USART_DMAy_Streamx[no-1], &DMA_InitStruct);
// Enable DMA Stream Transfer Complete interrupt
DMA_ITConfig(USART_DMAy_Streamx[no-1], DMA_IT_TC, ENABLE);
// DMA Stream enable
DMA_Cmd(USART_DMAy_Streamx[no-1], ENABLE);
//Check if the DMA Stream has been effectively enabled.
while (DMA_GetCmdStatus(USART_DMAy_Streamx[no-1]) != ENABLE);
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStructure.NVIC_IRQChannel = USART_DMA_IRQn[no-1];
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_ITConfig(USART_PORT[no-1], USART_IT_IDLE, ENABLE);
USART_ITConfig(Open_USART,USART_IT_RXNE,DISABLE);
USART_DMACmd(USART_PORT[no-1], USART_DMAReq_Rx, ENABLE);
USART_Cmd(USART_PORT[no-1], ENABLE);
USART_NVIC_Config(no);
// UartData[no-1].len = 0;
// UartData[no-1].callback = callback;
//USART_Cmd(Open_USART, ENABLE);
// USART_NVIC_Config(USARTx_OPEN);
}
void USART_IRQHandler(uint8_t no)
{
volatile char ch;
if(no > 6)
return;
CoEnterISR();
if(USART_GetITStatus(USART_PORT[no-1], USART_IT_RXNE) != RESET)
{
ch = USART_ReceiveData(USART_PORT[no-1]); // get received character
if(UartData[no-1].len >= USART_MAX_BUF_LEN)
{
mem_cpy(&UartData[no-1].data[0], &UartData[no-1].data[1], USART_MAX_BUF_LEN-1);
UartData[no-1].data[USART_MAX_BUF_LEN-1] = ch;
}
else
{
UartData[no-1].data[UartData[no-1].len] = ch;
UartData[no-1].len += 1;
}
//
}
else if(USART_GetITStatus(USART_PORT[no-1], USART_IT_IDLE) != RESET)
{
DMA_InitTypeDef DMA_InitStruct;
ch = USART_ReceiveData(USART_PORT[no-1]); //clear IDLE flag by read USART_SR and USART_DR
//get received data length
UartData[no-1].len = USART_MAX_BUF_LEN - USART_DMAy_Streamx[no-1]->NDTR;
mem_cpy(&UartData[no-1].data[0], &USART_RxBuffer[no-1][0], UartData[no-1].len);
//analyze the received data and send out the response
if(UartData[no-1].callback != NULL)
((void (*)(uint8_t))UartData[no-1].callback)(no);
//----------------
switch(no)
{
case 1:
case 6:
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA2, DISABLE);
break;
case 2:
case 3:
case 4:
case 5:
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA1, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA1, DISABLE);
break;
}
//----------------
//disable DMA
DMA_Cmd(USART_DMAy_Streamx[no-1], DISABLE);
//Check if the DMA Stream has been effectively disabled.
while (DMA_GetCmdStatus(USART_DMAy_Streamx[no-1]) != DISABLE);
//init DMA channel
DMA_StructInit(&DMA_InitStruct);
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&USART_PORT[no-1]->DR;
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART_RxBuffer[no-1][0];
DMA_InitStruct.DMA_BufferSize = USART_MAX_BUF_LEN;
DMA_InitStruct.DMA_Channel = USART_DMA_CHAN[no-1];
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USART_DMAy_Streamx[no-1], &DMA_InitStruct);
// Enable DMA Stream Transfer Complete interrupt
DMA_ITConfig(USART_DMAy_Streamx[no-1], DMA_IT_TC, ENABLE);
// DMA Stream enable
DMA_Cmd(USART_DMAy_Streamx[no-1], ENABLE);
//Check if the DMA Stream has been effectively enabled.
while (DMA_GetCmdStatus(USART_DMAy_Streamx[no-1]) != ENABLE);
}
CoExitISR();
} |
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