module ero(fin,out0,out1); output out0 ,out1; input fin ; //output fout; reg out0,out1;
////////////////////////////// initial begin out0 = 0; out1 = 0; end
////////////////////////////// always @(posedge fin) begin out0 = !out0; end
/////////////////////////////// always @(posedge out0)
begin out1 = !out1; end endmodule
//结果out1输出方波
file:///C:/Users/Administrator.ZGC-20120211YMZ/AppData/Local/Temp/Wiz/43d820fa-0994-4cc2-b425-c00a5bc54dcc_1_files/31706735.png 但若将always @(posedge out0) 改为 always @(out0) 则功能仿真结果中out1 ,无变法!!file:///C:/Users/Administrator.ZGC-20120211YMZ/AppData/Local/Temp/Wiz/43d820fa-0994-4cc2-b425-c00a5bc54dcc_1_files/31910800.png |