C50: xu3205_ram_8x11
port map (
data => WRDATA(29 downto 0),
rdaddress => RDADDRESS(9 downto 0),
rdclock => RCLK,
wraddress => WRADDRESS(9 downto 0),
wrclock => WCLK,
wren => WREN,
q => q(29 downto 0)
);
C51: xu3205_ram_8x11
port map (
data => SD_MEMDT(29 downto 0),
rdaddress => RDADDRESS_2(9 downto 0),
rdclock => RCLK,
wraddress => WR_ADDRESS_2(9 downto 0),
wrclock => RCLK,
wren => WR_EN_2,
q => RDDAT_2(29 downto 0)
);
以上信号分配给两个端口可以吗？ |
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