GD32E505 CAN0 PA11 PA12 无法接收喝发送数据

只看该作者 · 2023-4-20 15:15

/*!
\brief    configure GPIO
\param[in]  none
\param[out] none
\retval    none
*/
void gpio_config(void)
{
/* enable can clock */
rcu_periph_clock_enable(RCU_CAN0);
rcu_periph_clock_enable(RCU_CAN1);
  rcu_periph_clock_enable(RCU_GPIOB);
rcu_periph_clock_enable(RCU_GPIOA);

rcu_periph_clock_enable(RCU_AF);

  /* configure CAN0 GPIO, CAN0_TX(PA12) and CAN0_RX(PA11) */

gpio_init(GPIOA,GPIO_MODE_IPU,GPIO_OSPEED_50MHZ,GPIO_PIN_11);/*RX*/
gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_12);/*TX*/

gpio_pin_remap_config(GPIO_CAN0_PARTIAL_REMAP,DISABLE);

// gpio_pin_remap_config(GPIO_CAN0_FULL_REMAP,ENABLE);
//
//

// gpio_init(GPIOB,GPIO_MODE_IPU,GPIO_OSPEED_50MHZ,GPIO_PIN_12);/*RX*/
// gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_13);/*TX*/
//
// gpio_pin_remap_config(GPIO_CAN1_FULL_REMAP,ENABLE);

}
void can0_networking_init(void)
{
can_parameter_struct can_parameter;
can_filter_parameter_struct can_filter;

gpio_config();

can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);
/* initialize CAN register */
can_deinit(CAN0);
/*90M*/
/* initialize CAN parameters */
can_parameter.time_triggered = DISABLE;
can_parameter.auto_bus_off_recovery = DISABLE;
can_parameter.auto_wake_up = DISABLE;
can_parameter.auto_retrans = DISABLE;
can_parameter.rec_fifo_overwrite = DISABLE;
can_parameter.trans_fifo_order = DISABLE;
can_parameter.working_mode = CAN_NORMAL_MODE;
/* configure CAN0 baud rate 1Mbps */
can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;
can_parameter.time_segment_1 = CAN_BT_BS1_7TQ;
can_parameter.time_segment_2 = CAN_BT_BS2_2TQ;
can_parameter.prescaler = 9;
/* initialize CAN */
can_init(CAN0, &can_parameter);
// can_init(CAN1, &can_parameter);

/* initialize filter */
/* configure filter mode */
can_filter.filter_mode = CAN_FILTERMODE_MASK;
can_filter.filter_bits = CAN_FILTERBITS_32BIT;
/* configure filter ID, only the 0xaabb expand ID can be received */
can_filter.filter_list_high = 0x0000;
can_filter.filter_list_low = 0x0000;
/* configure filter mask */
can_filter.filter_mask_high = 0x0000;
can_filter.filter_mask_low = 0x0000;
/* select receiver fifo */
can_filter.filter_fifo_number = CAN_FIFO0;
can_filter.filter_number = 0;
can_filter.filter_enable = ENABLE;
can_filter_init(CAN0, &can_filter);

/* configure CAN0 NVIC */

#if defined(GD32E50X_HD)
/* configure CAN0 NVIC */
nvic_irq_enable(USBD_LP_CAN0_RX0_IRQn, 0, 0);
#else
/* configure CAN0 NVIC */
nvic_irq_enable(CAN0_RX0_IRQn, 0, 0);
#endif /* GD32E50X_HD */

/* enable can receive FIFO0 not empty interrupt */
can_interrupt_enable(CAN0, CAN_INTEN_RFNEIE0);

      /* initialize transmit message */
can_struct_para_init(CAN_TX_MESSAGE_STRUCT, &can0_transmit_message);
can0_transmit_message.tx_sfid = 0x00;
can0_transmit_message.tx_efid = 0x00;
can0_transmit_message.tx_ft = CAN_FT_DATA;
can0_transmit_message.tx_ff = CAN_FF_EXTENDED;
can0_transmit_message.tx_dlen = 8;
/* initialize receive message */
can_struct_para_init(CAN_RX_MESSAGE_STRUCT, &can0_receive_message);

}