【MA35D1】Buildroot下如何修改CANFD时钟频率

2万 · 2023-8-3 15:11

Buildroot下如何修改CANFD时钟频率

只看该作者 · 2023-8-4 10:14

在DTS文件：ma35d1.dtsi

以修改can1为例，频率修改为50M，添加下面的配置：

      can1: can@403D0000 {

            compatible = "bosch,m_can";

            reg = <0x0 0x403D0000 0x0 0x200>, <0x0 0x403D0200 0x0 0x2000>;

            reg-names = "m_can", "message_ram";

            interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,

                                       <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-names = "int0", "int1";

            clocks = <&clk HCLK3>,

                              <&clk CAN1_GATE>;

            clock-names = "hclk", "cclk";

            assigned-clocks = <&clk CAN1_DIV>;

            assigned-clock-parents = <&clk APLL>;

            assigned-clock-rates =<50000000>;

            bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>;

            status = "disable";

      };

1万 · 2023-8-4 15:00

在DTS文件：ma35d1.dtsi
以修改can1为例，频率修改为50M，添加下面的配置：

      can1: can@403D0000 {
            compatible = "bosch,m_can";
            reg = <0x0 0x403D0000 0x0 0x200>, <0x0 0x403D0200 0x0 0x2000>;
            reg-names = "m_can", "message_ram";
            interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
                                       <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "int0", "int1";
            clocks = <&clk HCLK3>,
                              <&clk CAN1_GATE>;
            clock-names = "hclk", "cclk";
            assigned-clocks = <&clk CAN1_DIV>;
            assigned-clock-parents = <&clk APLL>;
            assigned-clock-rates =<50000000>;
            bosch,mram-cfg = <0x0 4 4 32 32 32 8 8>;

            status = "disable";
      };

只看该作者 · 2023-9-26 19:08

讲解的不错。

只看该作者 · 2023-9-27 20:38

mark,用到时候再来看。