如题，我使用AT32F403ZGT6目前没能驱动DM9000，之前用AT32F407的XMC接口驱动DM9000成功了。
以下是IO配置情况，在AT32F407上可以正常使用。
/* enable the gpio clock */
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
/* enable the xmc clock */
crm_periph_clock_enable(CRM_XMC_PERIPH_CLOCK, TRUE);
/* remap */
// gpio_pin_remap_config(XMC_GMUX_001, TRUE);
/*-- gpio configuration ------------------------------------------------------*/
/* lcd data lines configuration */
gpio_init_struct.gpio_pins = GPIO_PINS_7 | GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13 | GPIO_PINS_14 | GPIO_PINS_15;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOE, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_14 | GPIO_PINS_15;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOD, &gpio_init_struct);
/* reset and isr lines configuration */
gpio_init_struct.gpio_pins = GPIO_PINS_4;
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOA, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_5;
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_UP;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOC, &gpio_init_struct);
/* rs/cs/wr/rd lines configuration */
gpio_init_struct.gpio_pins = GPIO_PINS_2;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOE, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_7 | GPIO_PINS_5;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOD, &gpio_init_struct);
//rt_dm9000_isr
rt_pin_mode(GET_PIN(C, 5), PIN_MODE_INPUT_PULLUP);
rt_pin_attach_irq(GET_PIN(C, 5), PIN_IRQ_MODE_FALLING, rt_dm9000_isr, RT_NULL);
rt_pin_irq_enable(GET_PIN(C, 5), PIN_IRQ_ENABLE);
/*-- xmc configuration ------------------------------------------------------*/
xmc_norsram_default_para_init(&xmc_norsram_init_struct);
xmc_norsram_init_struct.subbank = XMC_BANK1_NOR_SRAM1;
xmc_norsram_init_struct.data_addr_multiplex = XMC_DATA_ADDR_MUX_DISABLE;
xmc_norsram_init_struct.device = XMC_DEVICE_SRAM;
xmc_norsram_init_struct.bus_type = XMC_BUSTYPE_16_BITS;
xmc_norsram_init_struct.burst_mode_enable = XMC_BURST_MODE_DISABLE;
xmc_norsram_init_struct.asynwait_enable = XMC_ASYN_WAIT_DISABLE;
xmc_norsram_init_struct.wait_signal_lv = XMC_WAIT_SIGNAL_LEVEL_LOW;
xmc_norsram_init_struct.wrapped_mode_enable = XMC_WRAPPED_MODE_DISABLE;
xmc_norsram_init_struct.wait_signal_config = XMC_WAIT_SIGNAL_SYN_BEFORE;
xmc_norsram_init_struct.write_enable = XMC_WRITE_OPERATION_ENABLE;
xmc_norsram_init_struct.wait_signal_enable = XMC_WAIT_SIGNAL_DISABLE;
xmc_norsram_init_struct.write_timing_enable = XMC_WRITE_TIMING_ENABLE;
xmc_norsram_init_struct.write_burst_syn = XMC_WRITE_BURST_SYN_DISABLE;
xmc_nor_sram_init(&xmc_norsram_init_struct);
/* timing configuration */
xmc_norsram_timing_default_para_init(&rw_timing_struct, &w_timing_struct);
rw_timing_struct.subbank = XMC_BANK1_NOR_SRAM1;
rw_timing_struct.write_timing_enable = XMC_WRITE_TIMING_ENABLE;
rw_timing_struct.addr_setup_time = 0x4;
rw_timing_struct.addr_hold_time = 0x4;
rw_timing_struct.data_setup_time = 0x14;
rw_timing_struct.bus_latency_time = 0x0;
rw_timing_struct.clk_psc = 0x1;
rw_timing_struct.data_latency_time = 0x0;
rw_timing_struct.mode = XMC_ACCESS_MODE_A;
w_timing_struct.subbank = XMC_BANK1_NOR_SRAM1;
w_timing_struct.write_timing_enable = XMC_WRITE_TIMING_ENABLE;
w_timing_struct.addr_setup_time = 0x4;
w_timing_struct.addr_hold_time = 0x4;
w_timing_struct.data_setup_time = 0x14;
w_timing_struct.bus_latency_time = 0x0;
w_timing_struct.clk_psc = 0x1;
w_timing_struct.data_latency_time = 0x0;
w_timing_struct.mode = XMC_ACCESS_MODE_A;
xmc_nor_sram_timing_config(&rw_timing_struct, &w_timing_struct);
/* bus turnaround phase for consecutive read duration and consecutive write duration */
xmc_ext_timing_config(XMC_BANK1_NOR_SRAM1, 0x00, 0x00);
时序这里不是很明白该如何配置，尝试了几个数据没能驱动成功，读到的DM9000的ID不正确，为2B2A2928.
|
楼主
标题置顶
标题高亮
