GD32H7-SPI-DMA-SYNC
spi3 exit0 falling edge 触发同步;
void spi_dma_sync_config()
{
/**SPI3: PE5--MISO,PE6--MOSI,PE2--SCK,PE4--NSS3 */
rcu_periph_clock_enable(RCU_GPIOE);
gpio_af_set(GPIOE, GPIO_AF_5, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6);
gpio_mode_set(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6);
gpio_output_options_set(GPIOE, GPIO_OTYPE_PP, GPIO_OSPEED_100_220MHZ, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6);
//spi config
rcu_periph_clock_enable(RCU_SPI3);
rcu_spi_clock_config(IDX_SPI3, RCU_SPISRC_APB2);
spi_i2s_deinit(SPI3);
spi_parameter_struct spi_init_struct;
spi_struct_para_init(&spi_init_struct);
spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
spi_init_struct.device_mode = SPI_MASTER;
spi_init_struct.data_size = SPI_DATASIZE_8BIT;
spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_2EDGE;
spi_init_struct.nss = SPI_NSS_HARD;
spi_init_struct.prescale = SPI_PSC_32;//300M/8=37.5MHZ,300M/16=18.75MHZ
spi_init_struct.endian = SPI_ENDIAN_MSB;
spi_init(SPI3, &spi_init_struct);
// spi_master_receive_clock_delay_set(SPI3, 15);//0.5ns*20
spi_byte_access_enable(SPI3);//使能按字节访问
/* enable SPI NSS output ,is important for spi3*/
spi_nss_output_enable(SPI3);
// spi_current_data_num_config(SPI3, 1);
spi_enable(SPI3);
spi_dma_enable(SPI3, SPI_DMA_TRANSMIT);
spi_master_transfer_start(SPI3, SPI_TRANS_START);
//dma config
rcu_periph_clock_enable(RCU_DMA0);
rcu_periph_clock_enable(RCU_DMAMUX);
dma_single_data_parameter_struct dma_init_struct;
dma_single_data_para_struct_init(&dma_init_struct);
dmamux_sync_parameter_struct dmamux_sync_init_struct;
dmamux_sync_struct_para_init(&dmamux_sync_init_struct);
dma_deinit(DMA0, DMA_CH6);
dma_init_struct.request = DMA_REQUEST_SPI3_TX;
dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
dma_init_struct.memory0_addr = (uint32_t)ms1005_dma_txbuf;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
dma_init_struct.number = 5;
dma_init_struct.periph_addr = (uint32_t)&SPI_TDATA(SPI3);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_single_data_mode_init(DMA0, DMA_CH6, &dma_init_struct);
dma_circulation_enable(DMA0, DMA_CH6);
/* DMAMUX channle config */
dmamux_sync_init_struct.sync_id = DMAMUX_SYNC_EXTI0;//PE3
dmamux_sync_init_struct.sync_polarity = DMAMUX_SYNC_FALLING;
dmamux_sync_init_struct.request_number = 2;
dmamux_synchronization_init(DMAMUX_MUXCH6, &dmamux_sync_init_struct);
dmamux_synchronization_enable(DMAMUX_MUXCH6);
SCB_CleanDCache_by_Addr((uint32_t *)ms1005_dma_txbuf, 32);
dma_channel_enable(DMA0, DMA_CH6);
}
注意这几个的dma配置的顺序,要先使能spi,再配置dma;
还需要打开中断,一定要使能中断才可以;
void exit_sync_config()
{
rcu_periph_clock_enable(RCU_GPIOA);
rcu_periph_clock_enable(RCU_SYSCFG);
gpio_mode_set(GPIOA, GPIO_MODE_INPUT, GPIO_PUPD_NONE, GPIO_PIN_0);
syscfg_exti_line_config(EXTI_SOURCE_GPIOA, EXTI_SOURCE_PIN0);
exti_init(EXTI_0, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
nvic_irq_enable(EXTI0_IRQn, 2, 0);
}
main.c:
exit_sync_config();
spi_dma_sync_config();
之后,按下按键,就可以触发DMA传输,测试如下:
上面配置的同步请求数量request_number为2,也就是每次按键触发2次dma传输,每次传输1个字节;这里也可以用突发模式; 而上面配置的dma_init_struct.number = 5;则表示要发送的数组中只有前5个有效,当memory0_addr为+5时,会自动回到最初的地址;
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原文链接:https://blog.csdn.net/weixin_43310175/article/details/144845387
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