画PCB图进[行DRC检查时，为什么总是出现Processing Rule : Broken-Net Constraint ( (On the board ) )
Violation Net NetD1_K is broken into 3 sub-nets. Routed To 50.00%
Subnet : D2-K D1-K C2-1
Subnet : R4-2
Subnet : D3-1
Violation Net NetD5_K is broken into 3 sub-nets. Routed To 0.00%
Warning - net contains unplated pads
Subnet : D5-K
Subnet : Q3-1
Subnet : C2-2
Violation Net NetQ3_3 is broken into 2 sub-nets. Routed To 0.00%
Warning - net contains unplated pads
Subnet : Q4-3
Subnet : Q3-3
Violation Net NetR4_1 is broken into 2 sub-nets. Routed To 0.00%
Subnet : R5-2
Subnet : R4-1
Violation Net NetR5_1 is broken into 2 sub-nets. Routed To 0.00%
Subnet : R5-1
Subnet : Q3-2
Rule Violations :5
在DRC报告中。是什么意思啊，这些节点我都已经连接上了，怎么搞也错误都不能消除啊 |
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