// IFDDRRSE: Double Data Rate Input Register with Sync. Clear, Sync. Preset
// and Clock Enable.
// Spartan-3
// Xilinx HDL Libraries Guide
IFDDRRSE IFDDRRSE_inst (
.Q0(Q0), // Posedge data output
.Q1(Q1), // Negedge data output
.C0(C0), // 0 degree clock input
.C1(C1), // 180 degree clock input
.CE(CE), // Clock enable input
.D(D), // Data input (connect directly to top-level port)
.R(R), // Synchronous reset input
.S(S) // Synchronous preset input
);
// End of IFDDRRSE_inst instantiation |
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