VHDL when 无法使用常数?

只看该作者 · 2012-9-20 12:28

use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

case muxval is
when 0 => q <= i0;<------
end case;

改这样才可以 ?when x"0" => q <= i0;
----------------------------------------
另一个使用常数也不行?
constant INTIAL  : integer := 0;

when INTIAL+0 => q <= i0;<------

宣告都已经有 use IEEE.STD_LOGIC_UNSIGNED.ALL;   为什么不行?

1万 · 2012-9-20 13:37

use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

case muxval is
when 0 => q
nono2000 发表于 2012-9-20 12:28

表面看你的一种没有错误，但是不知道，你怎么定义的muxval.

1万 · 2012-9-20 13:38

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY SINGT IS
PORT ( CLK : IN STD_LOGIC;
DOUT : OUT INTEGER RANGE 255 DOWNTO 0 );
END;
ARCHITECTURE DACC OF SINGT IS
SIGNAL Q : INTEGER RANGE 63 DOWNTO 0 ;
SIGNAL D : INTEGER RANGE 255 DOWNTO 0 ;
BEGIN
PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
IF Q < 63 THEN Q <= Q + 1; ELSE Q <= 0 ; END IF; END IF;
END PROCESS;
PROCESS(Q)
BEGIN
CASE Q IS
WHEN 00=> D<=255; WHEN 01=> D<=254; WHEN 02=> D<=252; WHEN 03=> D<=249;
WHEN 04=> D<=245; WHEN 05=> D<=239; WHEN 06=> D<=233; WHEN 07=> D<=225;
WHEN 08=> D<=217; WHEN 09=> D<=207; WHEN 10=> D<=197; WHEN 11=> D<=186;
WHEN 12=> D<=174; WHEN 13=> D<=162; WHEN 14=> D<=150; WHEN 15=> D<=137;
WHEN 16=> D<=124; WHEN 17=> D<=112; WHEN 18=> D<= 99; WHEN 19=> D<= 87;
WHEN 20=> D<= 75; WHEN 21=> D<= 64; WHEN 22=> D<= 53; WHEN 23=> D<= 43;
WHEN 24=> D<= 34; WHEN 25=> D<= 26; WHEN 26=> D<= 19; WHEN 27=> D<= 13;
WHEN 28=> D<= 8; WHEN 29=> D<= 4; WHEN 30=> D<= 1; WHEN 31=> D<= 0;
WHEN 32=> D<= 0; WHEN 33=> D<= 1; WHEN 34=> D<= 4; WHEN 35=> D<= 8;
WHEN 36=> D<= 13; WHEN 37=> D<= 19; WHEN 38=> D<= 26; WHEN 39=> D<= 34;
WHEN 40=> D<= 43; WHEN 41=> D<= 53; WHEN 42=> D<= 64; WHEN 43=> D<= 75;
WHEN 44=> D<= 87; WHEN 45=> D<= 99; WHEN 46=> D<=112; WHEN 47=> D<=124;
WHEN 48=> D<=137; WHEN 49=> D<=150; WHEN 50=> D<=162; WHEN 51=> D<=174;
WHEN 52=> D<=186; WHEN 53=> D<=197; WHEN 54=> D<=207; WHEN 55=> D<=217;
WHEN 56=> D<=225; WHEN 57=> D<=233; WHEN 58=> D<=239; WHEN 59=> D<=245;
WHEN 60=> D<=249; WHEN 61=> D<=252; WHEN 62=> D<=254; WHEN 63=> D<=255;
WHEN OTHERS => NULL ;
END CASE; END PROCESS;
DOUT <= D ;
END;

1万 · 2012-9-20 13:38

看上面的例子。

1万 · 2012-9-20 13:38

第二种不符合语法。

1万 · 2012-9-20 13:40

CASE <表达式> IS
When <选择值或标识符> => <顺序语句>; ... ; <顺序语句> ；
When <选择值或标识符> => <顺序语句>; ... ; <顺序语句> ；
...
WHEN OTHERS => <顺序语句>;
END CASE ；
语法规定，是选择值或者标准符。你是两种同用。不行。

只看该作者 · 2012-9-20 14:35

CASE  IS
When  => ; ... ;  ；
When  => ; ... ;  ；
...
WHEN OTHERS => ;
END CASE ；
语法规定，是选择值或者标准符。你是两种同用。不行。
GoldSunMonkey 发表于 2012-9-20 13:40

請問 WHEN OTHERS => Q <=x"100" ( 8 downto 0 ); 這樣不可以嗎?
因為 Q 是 ( 8 downto 0 )

只看该作者 · 2012-9-20 16:35

谢谢说明:lol
ENTITY AA_Cotrl IS
PORT (
      iData                : in  std_logic_vector(7 DOWNTO 0);
      iRs                   : in std_logic;
      iStart                : in std_logic;
      );
END AA_Cotrl;
signal preStart    : std_logic;
合并判读怎么写?
if (preStart & iStart) = "01" then

1万 · 2012-9-20 21:54

請問 WHEN OTHERS => Q
um3567 发表于 2012-9-20 14:35

缺链接符

1万 · 2012-9-20 21:55

谢谢说明:lol
ENTITY AA_Cotrl IS
PORT (
      iData                : in  std_logic_ ...
nono2000 发表于 2012-9-20 16:35

弄个信号a=b&c，然后判断a即可。

VHDL when 无法使用常数?

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