VC55系列的DSP的寄存器在C语言中是如何寻址的?

只看该作者 · 2007-10-27 21:45

哪位大哥知道VC55系列的DSP的片内外设寄存器(比如McBSP和UART)在C语言中是如何寻址的?

只看该作者 · 2007-10-27 23:23

/*********************************************************************/
/* Register Definition  MCBSP                                         */
/*********************************************************************/

#define DRR2_ADDR(port)     (0x2800+(0x400*port))
#define DRR2(port)          *(ioport volatile unsigned int *)DRR2_ADDR(port)

#define DRR1_ADDR(port)        (DRR2_ADDR(port)+1)
#define DRR1(port)          *(ioport volatile unsigned int *)DRR1_ADDR(port)

#define DXR2_ADDR(port)     (DRR2_ADDR(port)+2)
#define DXR2(port)          *(ioport volatile unsigned int *)DXR2_ADDR(port)

#define DXR1_ADDR(port)        (DRR2_ADDR(port)+3)
#define DXR1(port)          *(ioport volatile unsigned int *)DXR1_ADDR(port)

#define SPCR2_ADDR(port)    (DRR2_ADDR(port)+4)
#define SPCR2(port)          *(ioport volatile unsigned int *)SPCR2_ADDR(port)

#define SPCR1_ADDR(port)    (DRR2_ADDR(port)+5)
#define SPCR1(port)          *(ioport volatile unsigned int *)SPCR1_ADDR(port)

#define RCR2_ADDR(port)        (DRR2_ADDR(port)+6)
#define RCR2(port)          *(ioport volatile unsigned int *)RCR2_ADDR(port)

#define RCR1_ADDR(port)        (DRR2_ADDR(port)+7)
#define RCR1(port)          *(ioport volatile unsigned int *)RCR1_ADDR(port)

#define XCR2_ADDR(port)        (DRR2_ADDR(port)+8)
#define XCR2(port)          *(ioport volatile unsigned int *)XCR2_ADDR(port)

#define XCR1_ADDR(port)        (DRR2_ADDR(port)+9)
#define XCR1(port)          *(ioport volatile unsigned int *)XCR1_ADDR(port)

#define SRGR2_ADDR(port)    (DRR2_ADDR(port)+10)
#define SRGR2(port)          *(ioport volatile unsigned int *)SRGR2_ADDR(port)

#define SRGR1_ADDR(port)    (DRR2_ADDR(port)+11)
#define SRGR1(port)          *(ioport volatile unsigned int *)SRGR1_ADDR(port)

#define MCR2_ADDR(port)        (DRR2_ADDR(port)+12)
#define MCR2(port)          *(ioport volatile unsigned int *)MCR2_ADDR(port)

#define MCR1_ADDR(port)        (DRR2_ADDR(port)+13)
#define MCR1(port)          *(ioport volatile unsigned int *)MCR1_ADDR(port)

#define RCERA_ADDR(port)    (DRR2_ADDR(port)+14)
#define RCERA(port)          *(ioport volatile unsigned int *)RCERA_ADDR(port)

#define RCERB_ADDR(port)    (DRR2_ADDR(port)+15)
#define RCERB(port)          *(ioport volatile unsigned int *)RCERB_ADDR(port)

#define XCERA_ADDR(port)    (DRR2_ADDR(port)+16)
#define XCERA(port)          *(ioport volatile unsigned int *)XCERA_ADDR(port)

#define XCERB_ADDR(port)    (DRR2_ADDR(port)+17)
#define XCERB(port)          *(ioport volatile unsigned int *)XCERB_ADDR(port)

#define PCR_ADDR(port)        (DRR2_ADDR(port)+18)
#define PCR(port)              *(ioport volatile unsigned int *)PCR_ADDR(port)

#define RCERC_ADDR(port)    (DRR2_ADDR(port)+19)
#define RCERC(port)          *(ioport volatile unsigned int *)RCERC_ADDR(port)

#define RCERD_ADDR(port)    (DRR2_ADDR(port)+20)
#define RCERD(port)          *(ioport volatile unsigned int *)RCERD_ADDR(port)

#define XCERC_ADDR(port)    (DRR2_ADDR(port)+21)
#define XCERC(port)          *(ioport volatile unsigned int *)XCERC_ADDR(port)

#define XCERD_ADDR(port)    (DRR2_ADDR(port)+22)
#define XCERD(port)          *(ioport volatile unsigned int *)XCERD_ADDR(port)

#define RCERE_ADDR(port)    (DRR2_ADDR(port)+23)
#define RCERE(port)          *(ioport volatile unsigned int *)RCERE_ADDR(port)

#define RCERF_ADDR(port)    (DRR2_ADDR(port)+24)
#define RCERF(port)          *(ioport volatile unsigned int *)RCERF_ADDR(port)

#define XCERE_ADDR(port)    (DRR2_ADDR(port)+25)
#define XCERE(port)          *(ioport volatile unsigned int *)XCERE_ADDR(port)

#define XCERF_ADDR(port)    (DRR2_ADDR(port)+26)
#define XCERF(port)          *(ioport volatile unsigned int *)XCERF_ADDR(port)

#define RCERG_ADDR(port)    (DRR2_ADDR(port)+27)
#define RCERG(port)          *(ioport volatile unsigned int *)RCERG_ADDR(port)

#define RCERH_ADDR(port)    (DRR2_ADDR(port)+28)
#define RCERH(port)          *(ioport volatile unsigned int *)RCERH_ADDR(port)

#define XCERG_ADDR(port)    (DRR2_ADDR(port)+29)
#define XCERG(port)          *(ioport volatile unsigned int *)XCERG_ADDR(port)

#define XCERH_ADDR(port)    (DRR2_ADDR(port)+30)
#define XCERH(port)          *(ioport volatile unsigned int *)XCERH_ADDR(port)

只看该作者 · 2007-10-28 20:27

多谢这位仁兄!我想再问一下: 如果是对MCBSP0的寄存器寻址,第一行地址就写0x2800,如果是对MCBSP1的寄存器寻址,那地址就是0x2c00了?为什么第一行是寄存器DRR2,而不是DRR1呢?看手册上(TMS320VC5502)DRR1的地址在前面,另外第一行的0x400*port是什么意思?小弟是在校学生,第一次接了DSP的项目,很多不会,还望仁兄指教

VC55系列的DSP的寄存器在C语言中是如何寻址的?

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