paralle 到parallel数据的转换也并没有是以意义，这里只是顺带说明，代码如下：
module p2p(clk,rstn,pi,po);
input clk;
input rstn;
input[4:0] pi;
output[4:0] po;
reg[8:0] r ;
always@(posedge clk or negedge rstn)
if(!rstn)
r <= 8'h0;
else
r <= pi;
assign po = r[4:0];
endmodule
以下内容为testbench：
module p2p_tb;
reg clk;
reg rstn;
reg[4:0] pi;
wire[4:0] po;
p2p ut(clk,rstn,pi,po);
initial begin
rstn = 0 ;
#5;
rstn = 1;
end
initial clk = 0;
always #10 clk = ~clk;
initial begin
pi = 9'h0;
#20;
pi = 9'h10;
#20;
pi = 9'h15;
#20;
pi = 9'h9;
#300;
$finish;
end
endmodule |
楼主
