本帖最后由 leadway2013 于 2013-3-8 11:16 编辑
MD622H应用说明-中国区代理经销立维创展提供
2:1 multiplexing ratio for each input bit of DAC
• Double Sampling Rate (DSR) DAC enables analog
output sampling rate twice of the clock rate
• Clock rate up to > 4 GHz with DAC analog output > 8
Gsps
• Complementary outputs with 50-Ω back terminations
• Complementary divided-by-2 clock LVDS outputs for
data synchronization
• Divide-by-2 clock output drivers with enable/disable
control without interrupting internal operations of the
chip
• On-chip 100 ohm termination between each differential
LVDS input data and RESET pair
• 2.7W power consumption
• QFN 10x10 88L package with exposed pad
MD622H应用更多资料请联系我公司,我公司为EUVIS原厂在中国区授权代理经销商。
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