uCOS-III基于AM335X的移植

只看该作者 · 2013-3-12 11:36

本帖最后由 nicholasldf 于 2013-11-9 19:25 编辑

OS_CPU_A.ASM文件

;********************************************************************************************************
;                                        EXTERNAL REFERENCE
;********************************************************************************************************
                                                            ; EXTERNal references.
EXTERN    OSRunning
EXTERN    OSPrioCur
EXTERN    OSPrioHighRdy
EXTERN    OSTCBCurPtr
EXTERN    OSTCBHighRdyPtr
EXTERN    OSIntNestingCtr
EXTERN    OSIntExit
EXTERN    OSTaskSwHook
EXTERN    OS_CPU_ExceptStkBase
EXTERN    OS_CPU_ExceptStkPtr
EXTERN    OS_CPU_IntHandler                            ; Chip Support/BSP specific exception handler.

;********************************************************************************************************
;                                           FUNCTIONS
;********************************************************************************************************

                                                            ; Functions declared in this file.
PUBLIC  OSStartHighRdy
PUBLIC  OSCtxSw
PUBLIC  OSIntCtxSw

                                                            ; Functions related to exception handling.
PUBLIC  OS_CPU_ARM_ExceptUndefInstrHndlr
PUBLIC  OS_CPU_ARM_ExceptSwiHndlr
PUBLIC  OS_CPU_ARM_ExceptPrefetchAbortHndlr
PUBLIC  OS_CPU_ARM_ExceptDataAbortHndlr
PUBLIC  OS_CPU_ARM_ExceptIrqHndlr
PUBLIC  OS_CPU_ARM_ExceptFiqHndlr

;PAGE
;********************************************************************************************************
;                                              EQUATES
;********************************************************************************************************

OS_CPU_ARM_CONTROL_INT_DIS       EQU    0xC0       ; Disable both FIQ and IRQ.
OS_CPU_ARM_CONTROL_FIQ_DIS       EQU    0x40       ; Disable FIQ.
OS_CPU_ARM_CONTROL_IRQ_DIS       EQU    0x80       ; Disable IRQ.
OS_CPU_ARM_CONTROL_THUMB          EQU    0x20       ; Set THUMB mode.
OS_CPU_ARM_CONTROL_ARM             EQU    0x00       ; Set ARM mode.

OS_CPU_ARM_MODE_MASK             EQU    0x1F
OS_CPU_ARM_MODE_USR                EQU    0x10
OS_CPU_ARM_MODE_FIQ                EQU    0x11
OS_CPU_ARM_MODE_IRQ                EQU    0x12
OS_CPU_ARM_MODE_SVC                EQU    0x13
OS_CPU_ARM_MODE_ABT                EQU    0x17
OS_CPU_ARM_MODE_UND                EQU    0x1B
OS_CPU_ARM_MODE_SYS                EQU    0x1F

OS_CPU_ARM_EXCEPT_RST             EQU    0x00
OS_CPU_ARM_EXCEPT_UND             EQU    0x01
OS_CPU_ARM_EXCEPT_SWI             EQU    0x02
OS_CPU_ARM_EXCEPT_ABORT_PREFETCH EQU    0x03
OS_CPU_ARM_EXCEPT_ABORT_DATA       EQU    0x04
OS_CPU_ARM_EXCEPT_RSVD             EQU    0x05
OS_CPU_ARM_EXCEPT_IRQ             EQU    0x06
OS_CPU_ARM_EXCEPT_FIQ             EQU    0x07

OS_CPU_ARM_FPEXC_EN EQU       0x40000000             ;VFP enable bit.

;********************************************************************************************************
;                                  CODE GENERATION DIRECTIVES
;********************************************************************************************************

RSEG CODE:CODE:NOROOT(2)
CODE32

;PAGE
;********************************************************************************************************
;                                        START MULTITASKING
;                                     void OSStartHighRdy(void)
;
; Note(s) : 1) OSStartHighRdy() MUST:
;             a) Call OSTaskSwHook() then,
;             b) Set OSRunning to OS_STATE_OS_RUNNING,
;             c) Switch to the highest priority task.
;********************************************************************************************************

OSStartHighRdy
                                                            ; Change to SVC mode.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

LDR    R0, =OSTaskSwHook                                  ; OSTaskSwHook();
MOV    LR, PC
BX    R0

LDR    R0, =OSRunning                                     ; OSRunning = TRUE;
MOV    R1, #1
STRB R1, [R0]
                                                            ; SWITCH TO HIGHEST PRIORITY TASK:
LDR    R0, =OSTCBHighRdyPtr                                  ; Get highest priority task TCB address,
LDR    R0, [R0]                                           ; Get stack pointer,
LDR    SP, [R0]                                           ; Switch to the new stack,

OS_CPU_ARM_FP_REG_POP  R0

LDMFD SP!, {R0}                                        ; Pop new task's CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pop new task's context.

;PAGE
;********************************************************************************************************
;                      PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
;
; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
;
;          2) The pseudo-code for OSCtxSw() is:
;             a) Save the current task's context onto the current task's stack,
;             b) OSTCBCurPtr->StkPtr = SP;
;             c) OSTaskSwHook();
;             d) OSPrioCur          = OSPrioHighRdy;
;             e) OSTCBCurPtrPtr       = OSTCBHighRdyPtr;
;             f) SP                = OSTCBHighRdyPtr->StkPtr;
;             g) Restore the new task's context from the new task's stack,
;             h) Return to new task's code.
;
;          3) Upon entry:
;             OSTCBCurPtrPtr    points to the OS_TCB of the task to suspend,
;             OSTCBHighRdyPtrPtr  points to the OS_TCB of the task to resume.
;********************************************************************************************************

OSCtxSw
                                                            ; SAVE CURRENT TASK'S CONTEXT:
STMFD SP!, {LR}                                        ;    Push return address,
STMFD SP!, {LR}
STMFD SP!, {R0-R12}                                     ;    Push registers,
MRS    R0, CPSR                                           ;    Push current CPSR,
TST    LR, #1                                           ;    See if called from Thumb mode,
ORRNE R0, R0, #OS_CPU_ARM_CONTROL_THUMB                ;    If yes, set the T-bit.
STMFD SP!, {R0}

OS_CPU_ARM_FP_REG_PUSH R0                               ;    Push FP context

LDR    R0, =OSTCBCurPtr                                  ; OSTCBCurPtr->StkPtr = SP;
LDR    R1, [R0]
STR    SP, [R1]

LDR    R0, =OSPrioCur                                     ; OSPrioCur = OSPrioHighRdy;
LDR    R1, =OSPrioHighRdy
LDRB R2, [R1]
STRB R2, [R0]

LDR    R0, =OSTCBCurPtr                                  ; OSTCBCurPtr = OSTCBHighRdyPtr;
LDR    R1, =OSTCBHighRdyPtr
LDR    R2, [R1]
STR    R2, [R0]

LDR    SP, [R2]                                           ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;

CLREX                                                    ; Clear the exclusive acess tag for the processor.

                                                            ; RESTORE NEW TASK'S CONTEXT:
OS_CPU_ARM_FP_REG_POP R0                               ; Pop new task's FP context.

LDMFD SP!, {R0}                                        ; Pop new task's CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pop new task's context.

;PAGE
;********************************************************************************************************
;                PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
;
; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
;
;          2) The pseudo-code for OSCtxSw() is:
;             a) OSTaskSwHook();
;             b) OSPrioCur = OSPrioHighRdy;
;             c) OSTCBCurPtrPtr = OSTCBHighRdyPtrPtr;
;             d) SP       = OSTCBHighRdyPtrPtr->OSTCBStkPtr;
;             e) Restore the new task's context from the new task's stack,
;             f) Return to new task's code.
;
;          3) Upon entry:
;             OSTCBCurPtrPtr    points to the OS_TCB of the task to suspend,
;             OSTCBHighRdyPtrPtr  points to the OS_TCB of the task to resume.
;********************************************************************************************************

OSIntCtxSw

LDR    R0, =OSTaskSwHook                                  ; OSTaskSwHook();
MOV    LR, PC
BX    R0

LDR    R0, =OSTCBCurPtr                                     ; OSTCBCurPtrPtr = OSTCBHighRdyPtr;
LDR    R1, =OSTCBHighRdyPtr
LDR    R2, [R1]
STR    R2, [R0]

LDR    SP, [R2]                                           ; SP = OSTCBHighRdyPtrPtr->OSTCBStkPtr;

CLREX                                                    ; Clear the exclusive acess tag for the processor.

                                                            ; RESTORE NEW TASK'S CONTEXT:
OS_CPU_ARM_FP_REG_POP R0                               ; Pop new task's FP context.

LDMFD SP!, {R0}                                        ; Pop new task's CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pop new task's context.

;PAGE
;********************************************************************************************************
;                            UNDEFINED INSTRUCTION EXCEPTION HANDLER
;
; Register Usage:  R0    Source ID
;                R1
;                R2    Return PC
;********************************************************************************************************

OS_CPU_ARM_ExceptUndefInstrHndlr
                                                            ; LR offset to return from this exception:  0.
STMFD SP!, {R0-R12, LR}                                  ; Push working registers.
MOV    R2, LR                                           ; Save link register.
MOV    R0, #OS_CPU_ARM_EXCEPT_UND                         ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
B          OS_CPU_ARM_ExceptHndlr                      ; Branch to global exception handler.

;********************************************************************************************************
;                               SOFTWARE INTERRUPT EXCEPTION HANDLER
;
; Register Usage:  R0    Source ID
;                R1
;                R2    Return PC
;********************************************************************************************************

OS_CPU_ARM_ExceptSwiHndlr
                                                            ; LR offset to return from this exception:  0.
STMFD SP!, {R0-R12, LR}                                  ; Push working registers.
MOV    R2, LR                                           ; Save link register.
MOV    R0, #OS_CPU_ARM_EXCEPT_SWI                         ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
B          OS_CPU_ARM_ExceptHndlr                      ; Branch to global exception handler.

;********************************************************************************************************
;                               PREFETCH ABORT EXCEPTION HANDLER
;
; Register Usage:  R0    Source ID
;                R1
;                R2    Return PC
;********************************************************************************************************

OS_CPU_ARM_ExceptPrefetchAbortHndlr

SUB    LR, LR, #4                                        ; LR offset to return from this exception: -4.
STMFD SP!, {R0-R12, LR}                                  ; Push working registers.
MOV    R2, LR                                           ; Save link register.
MOV    R0, #OS_CPU_ARM_EXCEPT_ABORT_PREFETCH             ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
B          OS_CPU_ARM_ExceptHndlr                      ; Branch to global exception handler.

;********************************************************************************************************
;                                  DATA ABORT EXCEPTION HANDLER
;
; Register Usage:  R0    Source ID
;                R1
;                R2    Return PC
;********************************************************************************************************

OS_CPU_ARM_ExceptDataAbortHndlr

SUB    LR, LR, #8                                        ; LR offset to return from this exception: -8.
STMFD SP!, {R0-R12, LR}                                  ; Push working registers.
MOV    R2, LR                                           ; Save link register.
MOV    R0, #OS_CPU_ARM_EXCEPT_ABORT_DATA                ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
B          OS_CPU_ARM_ExceptHndlr                      ; Branch to global exception handler.

;PAGE
;********************************************************************************************************
;                               INTERRUPT REQUEST EXCEPTION HANDLER
;
; Register Usage:  R0    Source ID
;                R1
;                R2    Return PC
;********************************************************************************************************

OS_CPU_ARM_ExceptFiqHndlr

SUB    LR, LR, #4                                        ; LR offset to return from this exception: -4.
STMFD SP!, {R0-R12, LR}                                  ; Push working registers.
MOV    R2, LR                                           ; Save link register.
MOV    R0, #OS_CPU_ARM_EXCEPT_FIQ                         ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
B          OS_CPU_ARM_ExceptHndlr                      ; Branch to global exception handler.

只看该作者 · 2013-3-12 11:53

本帖最后由 nicholasldf 于 2013-11-9 19:28 编辑

OS_CPU_A.ASM文件 ---------------续-------------------
;********************************************************************************************************
;                                     GLOBAL EXCEPTION HANDLER
;********************************************************************************************************

OS_CPU_ARM_ExceptHndlr
MRS    R1, SPSR                                           ; Save CPSR (i.e. exception's SPSR).

                                                            ; DETERMINE IF WE INTERRUPTED A TASK/IRQ OR ANOTHER LOWER PRIORITY EXCEPTION:
                                                            ; SPSR.Mode = SVC             :  task or IRQ handled in SVC mode,
                                                            ; SPSR.Mode = FIQ, IRQ, ABT, UND :  other exceptions,
                                                            ; SPSR.Mode = USR             : *unsupported state*.
AND    R3, R1, #OS_CPU_ARM_MODE_MASK
CMP    R3,    #OS_CPU_ARM_MODE_SVC
BNE    OS_CPU_ARM_ExceptHndlr_BrkExcept

;********************************************************************************************************
;                            EXCEPTION HANDLER: EXCEPTION INTERRUPTED
;
; Register Usage:  R0    Source ID
;                R1
;                R2
;                R3
;********************************************************************************************************

OS_CPU_ARM_ExceptHndlr_BrkExcept
STMFD SP!, {R1}                                        ; Push exception's SPSR.

MRS    R3, CPSR                                           ; Push exception's CPSR.

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
STMFD SP!, {R3}

                                                            ; HANDLE NESTING COUNTER:
LDR    R2, =OSIntNestingCtr                                  ; OSIntNestingCtr++;
LDRB R4, [R2]
ADD    R4, R4, #1
STRB R4, [R2]

MSR    CPSR_cxsf, R3                                     ; RESTORE INTERRUPTED MODE.

                                                            ; EXECUTE EXCEPTION/INTERRUPT HANDLER:
LDR    R2, =OS_CPU_IntHandler                            ; OS_CPU_IntHandler(src_id = R0);
MOV    LR, PC
BX    R2

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

                                                            ; HANDLE NESTING COUNTER:
LDR    R2, =OSIntNestingCtr                                  ; OSIntNestingCtr--;
LDRB R4, [R2]
SUB    R4, R4, #1
STRB R4, [R2]

LDMFD SP!, {R3}
MSR    CPSR_cxsf, R3                                     ; RESTORE INTERRUPTED MODE.

                                                            ; RESTORE INTERRUPTED EXCEPTIONS' CONTEXT:
LDMFD SP!, {R0}                                        ; Pop exception's CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, PC}^                               ; Pull working registers and return from exception.

;********************************************************************************************************
;                                  EXCEPTION HANDLER: IRQ INTERRUPTED
;
; Register Usage:  R0    Source ID
;                R1
;                R2
;                R3
;********************************************************************************************************

OS_CPU_ARM_ExceptHndlr_BrkIRQ
MSR    CPSR_cxsf, R3                                     ; RESTORE INTERRUPTED MODE.

                                                            ; EXECUTE EXCEPTION/INTERRUPT HANDLER:
LDR    R1, =OS_CPU_IntHandler                            ; OS_CPU_IntHandler(src_id = R0);
MOV    LR, PC
BX    R1

                                                            ; Adjust exception stack pointer.  This is needed because
                                                            ; exception stack is not used when restoring IRQ context.
ADD    SP, SP, #(14 * 4)

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

                                                            ; HANDLE NESTING COUNTER:
LDR    R2, =OSIntNestingCtr                                  ; OSIntNestingCtr--;
LDRB R4, [R2]
SUB    R4, R4, #1
STRB R4, [R2]

                                                            ; RESTORE IRQ'S CONTEXT:
OS_CPU_ARM_FP_REG_POP  R0                                  ; Pop exception's FP context.
LDMFD SP!, {R0}                                        ; Pop IRQ's CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pop IRQ's context.

;********************************************************************************************************
;                                           IRQ HANDLER
;********************************************************************************************************
OS_CPU_ARM_ExceptIrqHndlr
SUB    LR, LR, #4                                        ; LR offset to return from this exception: -4.
STMFD SP!, {R0-R3}                                     ; Push working registers.

MOV    R0, #OS_CPU_ARM_EXCEPT_IRQ                         ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
MRS    R1, SPSR                                           ; Save CPSR (i.e. exception's SPSR).
MOV    R2, LR                                           ; Save link register.
MOV    R3, SP                                           ; Save exception's stack pointer.

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

                                                            ; SAVE CONTEXT ONTO SVC STACK:
STMFD SP!, {R2}                                        ; Push task's PC,
STMFD SP!, {LR}                                        ; Push task's LR,
STMFD SP!, {R4-R12}                                     ; Push task's R12-R4,
LDMFD R3!, {R5-R8}                                     ; Move task's R3-R0 from exception stack to task's stack.
STMFD SP!, {R5-R8}
STMFD SP!, {R1}                                        ; Push task's CPSR (i.e. exception SPSR).

OS_CPU_ARM_FP_REG_PUSH  R3                               ; Push FP context
                                                            ; if (OSRunning == 1)
LDR    R3, =OSRunning
LDRB R4, [R3]
CMP    R4, #1
BNE    OS_CPU_ARM_IRQHndlr_BreakNothing

                                                            ; HANDLE NESTING COUNTER:
LDR    R3, =OSIntNestingCtr                                  ; OSIntNestingCtr++;
LDRB R4, [R3]
ADD    R4, R4, #1
STRB R4, [R3]

CMP    R4, #1                                           ; if (OSIntNestingCtr == 1)
BNE    OS_CPU_ARM_IRQHndlr_BreakIRQ

;PAGE
;********************************************************************************************************
;                                     IRQ HANDLER: IRQ INTERRUPTED
;
; Register Usage:  R0    Source ID
;                R1
;                R2
;                R3
;********************************************************************************************************

OS_CPU_ARM_IRQHndlr_BreakIRQ
LDR    R3, =OS_CPU_ExceptStkPtr                         ; OS_CPU_ExceptStkPtr = SP;
STR    SP, [R3]

                                                            ; EXECUTE EXCEPTION/INTERRUPT HANDLER:
LDR    R3, =OS_CPU_IntHandler                            ; OS_CPU_IntHandler(src_id = R0)
MOV    LR, PC
BX    R3

                                                            ; Change to IRQ mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_IRQ)

                                                            ; Adjust exception stack pointer.  This is needed because
                                                            ; exception stack is not used when restoring task context.
ADD    SP, SP, #(4 * 4)

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

                                                            ; HANDLE NESTING COUNTER:
LDR    R3, =OSIntNestingCtr                                  ; OSIntNestingCtr--;
LDRB R4, [R3]
SUB    R4, R4, #1
STRB R4, [R3]

                                                            ; RESTORE OLD CONTEXT:
OS_CPU_ARM_FP_REG_POP R0                               ; Pop old FP context.
LDMFD SP!, {R0}                                        ; Pop old CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pull working registers and return from exception.

;PAGE
;********************************************************************************************************
;                                  IRQ HANDLER: 'NOTHING' INTERRUPTED
;
; Register Usage:  R0    Source ID
;                R1
;                R2
;                R3
;********************************************************************************************************

OS_CPU_ARM_IRQHndlr_BreakNothing:
                                                            ; EXECUTE EXCEPTION/INTERRUPT HANDLER:
LDR    R3, =OS_CPU_IntHandler                            ; OS_CPU_IntHandler(src_id = R0)
MOV    LR, PC
BX    R3

                                                            ; Change to IRQ mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_IRQ)

                                                            ; Adjust exception stack pointer.  This is needed because
                                                            ; exception stack is not used when restoring task context.
ADD    SP, SP, #(4 * 4)

                                                            ; Change to SVC mode & disable interruptions.
MSR    CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)

                                                            ; RESTORE OLD CONTEXT:
OS_CPU_ARM_FP_REG_POP R0                               ; Pop old FP context.
LDMFD SP!, {R0}                                        ; Pop old CPSR,
MSR    SPSR_cxsf, R0

LDMFD SP!, {R0-R12, LR, PC}^                            ; Pull working registers and return from exception.

      END

只看该作者 · 2013-3-12 21:43

本帖最后由 nicholasldf 于 2013-11-9 19:29 编辑

OS_CPU_C.C文件

/*
*********************************************************************************************************
*                                           INCLUDE FILES
*********************************************************************************************************
*/

#define  OS_CPU_GLOBALS

#include <os.h>

/*************************************************************************************************
*                                                 IDLE TASK HOOK
************************************************************************************************
*/
void  OSIdleTaskHook (void)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) {
      (*OS_AppIdleTaskHookPtr)();
}
#endif
}

/*
************************************************************************************************************************
*                                              OS INITIALIZATION HOOK
************************************************************************************************************************
*/
void  OSInitHook (void)
{
// - 初始化中断堆栈（专门用于IRQ中断处理的堆栈）
CPU_INT32U size;
CPU_STK  *pstk;
/* Clear exception stack for stack checking.*/
pstk = &OS_CPU_ExceptStk[0];

while (size > 0u) {
      size--;
   *pstk++ = (CPU_STK)0;
}

//此版本无OS_AppInitHookPtr接口
//#if OS_CFG_APP_HOOKS_EN > 0u
// if (OS_AppInitHookPtr != (OS_APP_HOOK_VOID)0) {
//       (*OS_AppInitHookPtr)();
// }
//#endif
}

/*
************************************************************************************************************************
*                                              STATISTIC TASK HOOK
*
* Description: This function is called every second by uC/OS-III's statistics task.  This allows your application to add
*             functionality to the statistics task.
************************************************************************************************************************
*/
void  OSStatTaskHook (void)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) {
      (*OS_AppStatTaskHookPtr)();
}
#endif
}

/*
************************************************************************************************************************
*                                                 TASK CREATION HOOK
*
* Description: This function is called when a task is created.
*
* Arguments  : p_tcb is a pointer to the task control block of the task being created.
************************************************************************************************************************
*/
void  OSTaskCreateHook (OS_TCB *p_tcb)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) {
      (*OS_AppTaskCreateHookPtr)(p_tcb);
}
#else
(void)p_tcb;                                           /* Prevent compiler warning                            */
#endif
}

/*
************************************************************************************************************************
*                                                 TASK DELETION HOOK
*
* Description: This function is called when a task is deleted.
*
* Arguments  : p_tcb is a pointer to the task control block of the task being deleted.
************************************************************************************************************************
*/
void  OSTaskDelHook (OS_TCB *p_tcb)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) {
      (*OS_AppTaskDelHookPtr)(p_tcb);
}
#else
(void)p_tcb;                                           /* Prevent compiler warning                            */
#endif
}

/*
************************************************************************************************************************
*                                                 TASK RETURN HOOK
* Description: This function is called if a task accidentally returns.  In other words, a task should either be an
*             infinite loop or delete itself when done.
* Arguments  : p_tcb is a pointer to the task control block of the task that is returning.
************************************************************************************************************************
*/
void  OSTaskReturnHook (OS_TCB  *p_tcb)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) {
      (*OS_AppTaskReturnHookPtr)(p_tcb);
}
#else
(void)p_tcb;
#endif
}

/*
*********************************************************************************************************
*                                     INITIALIZE A TASK'S STACK
**********************************************************************************************************
*/
CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task,
                     void       *p_arg,
                     CPU_STK    *p_stk_base,
                     CPU_STK    *p_stk_limit,
                     CPU_STK_SIZE stk_size,
                     OS_OPT       opt)
{
CPU_STK *p_stk;
CPU_STK    task_addr;

p_stk    = &p_stk_base[stk_size];                         /* Load stack pointer                                  */
p_stk    = (CPU_STK *)((CPU_STK)(p_stk) & 0xFFFFFFF8u);
task_addr = (CPU_STK)p_task & ~1u;                         /* Mask off lower bit in case task is thumb mode       */

*--p_stk  = (CPU_STK)task_addr;                            /* Entry Point                                           */
*--p_stk  = (CPU_STK)OS_TaskReturn;                         /* R14 (LR)                                              */
*--p_stk  = (CPU_STK)0x12121212u;                         /* R12                                                 */
*--p_stk  = (CPU_STK)0x11111111u;                         /* R11                                                 */
*--p_stk  = (CPU_STK)0x10101010u;                         /* R10                                                 */
*--p_stk  = (CPU_STK)0x09090909u;                         /* R9                                                    */
*--p_stk  = (CPU_STK)0x08080808u;                         /* R8                                                    */
*--p_stk  = (CPU_STK)0x07070707u;                         /* R7                                                    */
*--p_stk  = (CPU_STK)0x06060606u;                         /* R6                                                    */
*--p_stk  = (CPU_STK)0x05050505u;                         /* R5                                                    */
*--p_stk  = (CPU_STK)0x04040404u;                         /* R4                                                    */
*--p_stk  = (CPU_STK)0x03030303u;                         /* R3                                                    */
*--p_stk  = (CPU_STK)0x02020202u;                         /* R2                                                    */
*--p_stk  = (CPU_STK)0x01010101u;                         /* R1                                                    */
*--p_stk  = (CPU_STK)p_arg;                               /* R0 : argument                                        */

return (p_stk);
}

/*
************************************************************************************************************************
*                                                 TASK SWITCH HOOK
*
* Description: This function is called when a task switch is performed.  This allows you to perform other operations
*             during a context switch.
*
* Arguments  : none
*
* Note(s) : 1) Interrupts are disabled during this call.
*             2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task that will be
*                'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points to the task being switched out
*                (i.e. the preempted task).
************************************************************************************************************************
*/
void  OSTaskSwHook (void)
{
#if OS_CFG_TASK_PROFILE_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN)
CPU_TS    ts;
#endif
#ifdef  CPU_CFG_INT_DIS_MEAS_EN
CPU_TS    int_dis_time;
#endif

#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
      (*OS_AppTaskSwHookPtr)();
}
#endif

#if OS_CFG_TASK_PROFILE_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN)
ts = OS_TS_GET();
if (OSTCBCurPtr != OSTCBHighRdyPtr) {
      OSTCBCurPtr->CyclesDelta  = ts - OSTCBCurPtr->CyclesStart;
      OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta;
}

OSTCBHighRdyPtr->CyclesStart = ts;
#endif

#ifdef  CPU_CFG_INT_DIS_MEAS_EN
int_dis_time = CPU_IntDisMeasMaxCurReset();          /* Keep track of per-task interrupt disable time       */
if (int_dis_time > OSTCBCurPtr->IntDisTimeMax) {
      OSTCBCurPtr->IntDisTimeMax = int_dis_time;
}
#endif

#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u
if (OSSchedLockTimeMaxCur > OSTCBCurPtr->SchedLockTimeMax) { /* Keep track of per-task scheduler lock time       */
      OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur;
      OSSchedLockTimeMaxCur       = (CPU_TS)0;             /* Reset the per-task value                         */
}
#endif
}

/*
************************************************************************************************************************
*                                                    TICK HOOK
*
* Description: This function is called every tick.
*
* Arguments  : none
*
* Note(s) : 1) This function is assumed to be called from the Tick ISR.
************************************************************************************************************************
*/
void  OSTimeTickHook (void)
{
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) {
      (*OS_AppTimeTickHookPtr)();
}
#endif
}

/*
*********************************************************************************************************
*                            GET NUMBER OF FREE ENTRIES IN EXCEPTION STACK
*
* Description : This function computes the number of free entries in the exception stack.
*
* Arguments : None.
*
* Returns    : The number of free entries in the exception stack.
*********************************************************************************************************
*/
CPU_INT32U  OS_CPU_ExceptStkChk (void)
{
CPU_STK  *pchk;
CPU_INT32U nfree;
CPU_INT32U size;

nfree = 0;
size  = OS_CPU_EXCEPT_STK_SIZE;
pchk  = &OS_CPU_ExceptStk[0];
while ((*pchk++ == (CPU_STK)0) && (size > 0u)) { /* Compute the number of zero entries on the stk */
      nfree++;
      size--;
}

return (nfree);
}

只看该作者 · 2013-3-12 21:44

本帖最后由 nicholasldf 于 2013-11-9 19:30 编辑

中断向量表

/******************************************************************************
**                   INTERNAL VARIABLE DEFINITIONS
*******************************************************************************/
// - 定义并初始化异常向量表，设置向量表起始地址到CP15协处理器
/*
Vectors       LDR    PC,Reset_Addr
            LDR    PC,Undef_Addr
            LDR    PC,SWI_Addr
            LDR    PC,PAbt_Addr
            LDR    PC,DAbt_Addr
            SIZE_EXT_INFO; Reserved vector is used for image size information
            LDR    PC,IRQ_Addr ;Vector From AIC_IVR
            LDR    PC,FIQ_Addr ;Vector From AIC_FVR
Reset_Addr DCD    Reset_Handler
Undef_Addr DCD    OS_CPU_ARM_ExceptUndefInstrHndlr
SWI_Addr    DCD    OS_CPU_ARM_ExceptSwiHndlr
PAbt_Addr    DCD    OS_CPU_ARM_ExceptPrefetchAbortHndlr
DAbt_Addr    DCD    OS_CPU_ARM_ExceptDataAbortHndlr
Reserved    DCD    0;Reserved Address
IRQ_Addr    DCD    OS_CPU_ARM_ExceptIrqHndlr
FIQ_Addr    DCD    OS_CPU_ARM_ExceptFiqHndlr
*/

只看该作者 · 2013-3-12 21:44

本帖最后由 nicholasldf 于 2013-11-9 19:31 编辑

异常处理，中断处理

/*
*********************************************************************************************************
*                                        OS_CPU_ExceptHndlr()
*
* Description : Handle any exceptions.
*
* Argument(s) : except_id    ARM exception type:
*
*                               OS_CPU_ARM_EXCEPT_RESET          0x00
*                               OS_CPU_ARM_EXCEPT_UNDEF_INSTR    0x01
*                               OS_CPU_ARM_EXCEPT_SWI             0x02
*                               OS_CPU_ARM_EXCEPT_PREFETCH_ABORT 0x03
*                               OS_CPU_ARM_EXCEPT_DATA_ABORT       0x04
*                               OS_CPU_ARM_EXCEPT_ADDR_ABORT       0x05
*                               OS_CPU_ARM_EXCEPT_IRQ             0x06
*                               OS_CPU_ARM_EXCEPT_FIQ             0x07
*
* Return(s) : none.
*
* Caller(s) : OS_CPU_ARM_EXCEPT_HANDLER(), which is declared in os_cpu_a.s.
*
* Note(s)    : (1) Only OS_CPU_ARM_EXCEPT_FIQ and OS_CPU_ARM_EXCEPT_IRQ exceptions handler are implemented.
*                For the rest of the exception a infinite loop is implemented for debuging pruposes. This behavior
*                should be replaced with another behavior (reboot, etc).
*********************************************************************************************************
*/
void  OS_CPU_IntHandler (CPU_INT32U  except_id)
{
CPU_INT32U *p_sp;
char *pchar;

switch (except_id) {
      case OS_CPU_ARM_EXCEPT_FIQ:
         BSP_IntSched(OS_CPU_ARM_EXCEPT_FIQ);
         break;


case OS_CPU_ARM_EXCEPT_IRQ:
         BSP_IntSched(OS_CPU_ARM_EXCEPT_IRQ);
         break;
      //default:
      //    while(1){UARTPuts("55", -1);}; break;

      case OS_CPU_ARM_EXCEPT_RST:
         /* $$$$ Insert code to handle a Reset exception             */
         //
pchar = "CPU Exceptions - Reset\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      case OS_CPU_ARM_EXCEPT_UND:
         /* $$$$ Insert code to handle a Undefine Instruction exception */
pchar = "CPU Exceptions - Undefine Instruction\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      case OS_CPU_ARM_EXCEPT_SWI:
         /* $$$$ Insert code to handle a Software exception          */

pchar = "CPU Exceptions - Software exception\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      case OS_CPU_ARM_EXCEPT_ABORT_PREFETCH:
         /* $$$$ Insert code to handle a Prefetch Abort exception    */

pchar = "CPU Exceptions - Prefetch Abort exception\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      case OS_CPU_ARM_EXCEPT_ABORT_DATA:
         /* $$$$ Insert code to handle a Data Abort exception          */

pchar = "CPU Exceptions - Data Abort exception\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      case OS_CPU_ARM_EXCEPT_RSVD:
         /* $$$$ Insert code to handle a Address Abort exception       */
pchar = "CPU Exceptions - Address Abort exception\n\r";
goto Entry_OS_CPU_ExceptHndlr;
      default:
pchar = "CPU Exceptions - Unknow other exceptions\n\r";

Entry_OS_CPU_ExceptHndlr:
/* Infinite loop on other exceptions. (see note #1)       */
while(1){
            Debug_Printf(LOG_CRASH, pchar);

/*
- 以下为原始代码，有误，OSIntNestingCtr在这时为大于等于1
由于IRQ中断在SVC模式执行，因此，如果OSIntNestingCtr为1，则任务异常，
如果OSIntNestingCtr大于1，则中断代码异常。
if (OSIntNestingCtr == 1) {

p_sp = (CPU_INT32U *)OS_CPU_ExceptStkPtr;

} else {

p_sp = (CPU_INT32U *)OSTCBCurPtr->OSTCBStkPtr;

}
在OS_CPU_ARM_ExceptHndlr_BrkTask函数，如果任务被中断，此时OSIntNestingCtr为1
; HANDLE NESTING COUNTER:

LDR    R1, =OSIntNestingCtr ; OSIntNestingCtr++;

LDRB R2, [R1]

ADD    R2, R2, #1

STRB R2, [R1]
*/

if(OSIntNestingCtr == 1){
            //任务运行异常
Debug_Printf(LOG_CRASH, "Task %s exception\n\r", OSTCBCurPtr->NamePtr);
p_sp = (CPU_INT32U *)OSTCBCurPtr->StkPtr;
         }else{
            //中断运行异常
Debug_Printf(LOG_CRASH, "Interrupt exception\n\r");
p_sp = (CPU_INT32U *)OS_CPU_ExceptStkPtr;
         }

#if (1 == OS_CPU_ARM_FP_EN)
/*  - 如果使能了浮点协处理器的33个寄存器S0-S31和FPSCR，需要跳过这33个寄存器 */
            p_sp += 33;
#endif
         Debug_Printf(LOG_CRASH, "R0  : 0x%08x\n\r", *(p_sp + 0x01));
         Debug_Printf(LOG_CRASH, "R1  : 0x%08x\n\r", *(p_sp + 0x02));
         Debug_Printf(LOG_CRASH, "R2  : 0x%08x\n\r", *(p_sp + 0x03));
         Debug_Printf(LOG_CRASH, "R3  : 0x%08x\n\r", *(p_sp + 0x04));
         Debug_Printf(LOG_CRASH, "R4  : 0x%08x\n\r", *(p_sp + 0x05));
         Debug_Printf(LOG_CRASH, "R5  : 0x%08x\n\r", *(p_sp + 0x06));
         Debug_Printf(LOG_CRASH, "R6  : 0x%08x\n\r", *(p_sp + 0x07));
         Debug_Printf(LOG_CRASH, "R7  : 0x%08x\n\r", *(p_sp + 0x08));
         Debug_Printf(LOG_CRASH, "R8  : 0x%08x\n\r", *(p_sp + 0x09));
         Debug_Printf(LOG_CRASH, "R9  : 0x%08x\n\r", *(p_sp + 0x0A));
         Debug_Printf(LOG_CRASH, "R10 : 0x%08x\n\r", *(p_sp + 0x0B));
         Debug_Printf(LOG_CRASH, "R11 : 0x%08x\n\r", *(p_sp + 0x0C));
         Debug_Printf(LOG_CRASH, "R12 : 0x%08x\n\r", *(p_sp + 0x0D));
         Debug_Printf(LOG_CRASH, "SP  : 0x%08x\n\r", p_sp);
         Debug_Printf(LOG_CRASH, "LR  : 0x%08x\n\r", *(p_sp + 0x0E));
         Debug_Printf(LOG_CRASH, "PC  : 0x%08x\n\r", *(p_sp + 0x0F));
         Debug_Printf(LOG_CRASH, "CPSR: 0x%08x\n\r\n\r", *(p_sp + 0x00));
}//end while
break;
}//end switch
}

只看该作者 · 2013-3-12 21:45

OS_CPU.H文件

#ifndef  OS_CPU_H
#define  OS_CPU_H

/*
*********************************************************************************************************
*                                              include
*********************************************************************************************************
*/
#include  <uc_cpu.h>

#ifdef OS_CPU_GLOBALS
#define  OS_CPU_EXT
#else
#define  OS_CPU_EXT  extern
#endif

/*
*********************************************************************************************************
*                                        IRQ中断堆栈大小
*********************************************************************************************************
*/
#ifndef  OS_CPU_EXCEPT_STK_SIZE
#define  OS_CPU_EXCEPT_STK_SIZE 256u       /* Default exception stack size is 128 OS_STK entries.  */
#endif
OS_CPU_EXT  CPU_STK OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
OS_CPU_EXT  CPU_STK  *OS_CPU_ExceptStkBase;
OS_CPU_EXT  CPU_STK  *OS_CPU_ExceptStkPtr;

/*
*********************************************************************************************************
*                                              DEFINES
*********************************************************************************************************
*/
#define  OS_CPU_ARM_ENDIAN_LITTLE                      1u
#define  OS_CPU_ARM_ENDIAN_BIG                         2u
#define  OS_CPU_ARM_ENDIAN_TYPE                OS_CPU_ARM_ENDIAN_LITTLE

#define  OS_CPU_ARM_FP_EN                               1u
#define  OS_CPU_ARM_FP_REG_NBR                         32u

/*
*********************************************************************************************************
*                                     ARM EXCEPTION DEFINES
*********************************************************************************************************
*/
/*  ARM exception IDs  */
#define  OS_CPU_ARM_EXCEPT_RST                      0x00u
#define  OS_CPU_ARM_EXCEPT_UND                      0x01u
#define  OS_CPU_ARM_EXCEPT_SWI                      0x02u
#define  OS_CPU_ARM_EXCEPT_ABORT_PREFETCH             0x03u
#define  OS_CPU_ARM_EXCEPT_ABORT_DATA                0x04u
#define  OS_CPU_ARM_EXCEPT_RSVD                      0x05u
#define  OS_CPU_ARM_EXCEPT_IRQ                      0x06u
#define  OS_CPU_ARM_EXCEPT_FIQ                      0x07u
/*  ARM CPSR BIT DEFINES  */
#define  OS_CPU_ARM_BIT_CPSR_N                   (1u  << 31u)
#define  OS_CPU_ARM_BIT_CPSR_Z                   (1u  << 30u)
#define  OS_CPU_ARM_BIT_CPSR_C                   (1u  << 29u)
#define  OS_CPU_ARM_BIT_CPSR_V                   (1u  << 28u)
#define  OS_CPU_ARM_BIT_CPSR_Q                   (1u  << 27u)
#define  OS_CPU_ARM_BIT_CPSR_J                   (1u  << 24u)
#define  OS_CPU_ARM_MSK_CPSR_GE                   (0xF << 16u)
#define  OS_CPU_ARM_BIT_CPSR_E                   (1u << 9u)
#define  OS_CPU_ARM_BIT_CPSR_A                   (1u << 8u)
#define  OS_CPU_ARM_BIT_CPSR_I                   (1u << 7u)
#define  OS_CPU_ARM_BIT_CPSR_F                   (1u << 6u)
#define  OS_CPU_ARM_BIT_CPSR_T                   (1u << 5u)
/*  ARM CPSR_MODE  */
#define  OS_CPU_ARM_MSK_CPSR_MODE                      0x1Fu
#define  OS_CPU_ARM_BIT_CPSR_MODE_USER                   0x10u
#define  OS_CPU_ARM_BIT_CPSR_MODE_FIQ                   0x11u
#define  OS_CPU_ARM_BIT_CPSR_MODE_IRQ                   0x12u
#define  OS_CPU_ARM_BIT_CPSR_MODE_SUPERVISOR             0x13u
#define  OS_CPU_ARM_BIT_CPSR_MODE_ABORT                0x17u
#define  OS_CPU_ARM_BIT_CPSR_MODE_UNDEFINED             0x1Bu
#define  OS_CPU_ARM_BIT_CPSR_MODE_SYSTEM                0x1Fu

/*
*********************************************************************************************************
*                                              MACROS
*********************************************************************************************************
*/
#define  OS_TASK_SW()                         OSCtxSw()

/*
*********************************************************************************************************
*                                     TIMESTAMP CONFIGURATION
*
* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
*             any data type size.
*
*          (2) For architectures that provide 32-bit or higher precision free running counters
*             (i.e. cycle count registers):
*
*             (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
*                the timestamp.
*
*             (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
*                truncation of TS.
*********************************************************************************************************
*/
#if    OS_CFG_TS_EN == 1u
#define  OS_TS_GET()             (CPU_TS)CPU_TS_TmrRd() /* See Note #2a.                                        */
#else
#define  OS_TS_GET()             (CPU_TS)0u
#endif

/*
*********************************************************************************************************
*                                        FUNCTION PROTOTYPES
*********************************************************************************************************
*/
void    OSCtxSw                         (void);
void    OSIntCtxSw                      (void);
void    OSStartHighRdy                   (void);
void    OS_CPU_ARM_ExceptUndefInstrHndlr (void);
void    OS_CPU_ARM_ExceptSwiHndlr       (void);
void    OS_CPU_ARM_ExceptPrefetchAbortHndlr(void);
void    OS_CPU_ARM_ExceptDataAbortHndlr (void);
void    OS_CPU_ARM_ExceptIrqHndlr       (void);
void    OS_CPU_ARM_ExceptFiqHndlr       (void);

void    OS_CPU_IntHandler                (CPU_INT32U  src_id);
CPU_INT32U    OS_CPU_ExceptStkChk          (void);

#endif

只看该作者 · 2013-3-12 21:58

只看该作者 · 2013-3-13 08:19

这个是哪来的？楼主自己移植的？

只看该作者 · 2013-3-13 11:05

之前做过at91sam9260+uCOS-II的系统，本移植在此基础上修改而来。修改点：
1、选择uCOS-III，跟uCOS-II有些不同
2、AM335X是Cortex-A8芯片，集成了VFP向量浮点协处理器，需要做任务的VFP上下文保护；
3、针对AM335X中断系统特点，定制了中断向量表，以及中断服务函数；
4、异常处理增加打印异常时的当前任务、寄存器信息，以便系统异常时可以定位分析异常原因。

只看该作者 · 2013-3-13 11:09

之前做过at91sam9260+uCOS-II的系统，本移植在此基础上修改而来。修改点：
1、选择uCOS-III，跟uCOS-II有些不同
2、AM335X是Cortex-A8芯片，集成了VFP向量浮点协处理器，需要做任务的VFP上下文保护；
3、针对AM335X中断系统特点，定制了中断向量表，以及中断服务函数；
4、异常处理增加打印异常时的当前任务、寄存器信息，以便系统异常时可以定位分析异常原因。
5、uC-CPU移植
6、timeStamp移植

只看该作者 · 2013-3-13 12:22

micrium官方有AM35xx的移植，ucosII的

只看该作者 · 2013-3-13 14:30

呵呵，果然是啊，是2013年3月1号放上去的，基于AM3517的，不错，
不过AM35x系列跟AM335x中断系统和外设可能会有些不同，之前比较过一下这两款CPU，
不过有了uCOS-II的移植，总比没有好了，可以轻松的改为uCOS-III+AM335x的。。。
我是2012年10月份移植的，当时官网、网上、TI官网都没有找到，不支持，郁闷死了，只能自己移植了。。。。

Texas Instruments AM35x
μC/OS-II
µC/OS-II V2.92.07
EVM-AM3517
IAR (EWARM) V6.x
2013/03/01