一款开发读卡器方案很适合的ARM芯片。有兴趣的留下脚印啊！！
32-bit ARM7TDMI RISC static CMOS CPU core (Running up to 60 MHz)
8Kbytes combined instruction/data cache
Memory management unit
Supports Little-endian operating system
8Kbytes SRAM for internal buffer memory
2Kbytes Boot ROM
On-chip peripherals with individual power-down:
Memory controller for ROM(x8,16), Flash(x8,16), SRAM(x8,16), SDRAM(x16)
5-State Power management unit (Sofrware selectable Clock Frequency)
Interrupt Controller
LCD Controller for color and mono STN
USB 1.1(slave)
Two Smart Card Interface (UART 0,1)
Two UART (UART 2,3)
One SIR support UART (UART4)
One Modem support UART (UART5)
Four 16-bit Timer Channels (with Output Port)
Two 16-bit PWM Channels (with Output Port)
Programmable WatchDog Timer with On-chip Oscillator
Real-time clock (32.768kHz oscillator) with separated Vcc
Matrix Keyboard control interface (6x6)
97 Programmable GPIO
One 2-Wire Serial Bus Interface
2-Channel Master/Slave SSI (SPI)
SMC Card Interface
On-chip 3-Channel 10-bit ADC
JTAG debug interface and boundary scan
0.35um CMOS Process
3.3V supply voltage
208-pin LQFP / CABGA package
Low power consumption |
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