我从美国TI那边的专家处咨询到的解释原文如下：
This looks more like a digital setup/hold violation between the TVP5150 and the back end processing.
Make sure that your timing margins between the TVP5150 digital outputs and the next processing stage are correct. See section 4.3.3 Timing in the datasheet for output timing.
You can also try changing the polarity of the capture clock in the back end processor, or add a delay or inverter on the PCLK signal to adjust the timing relationships.
BR,
Steve
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