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Protel Design System Design Rule Check<br />PCB File : HDN-956-01 V2.3更新中....PCB<br />Date : 6-Mar-2009 <br />Time : 17:03:20<br /><br />WARNING: Unplated multi-layer pad(s) detected<br /> Pad 4-1(15.15999mm,5.00002mm) MultiLayer on Net GND<br /> Pad 3-1(155.15999mm,5.00002mm) MultiLayer on Net GND<br /> Pad 2-1(155.15999mm,115.00003mm) MultiLayer on Net GND<br /> Pad 1-1(15.15999mm,115.00003mm) MultiLayer on Net GND<br />Total: 4<br /><br />Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )<br />Rule Violations :0<br /><br />Processing Rule : Broken-Net Constraint ( (On the board ) )<br /> Violation Net GND <br /> <font color=#FF0000>Warning - net contains unplated pads</font><br />Rule Violations :1<br /><br />Processing Rule : Clearance Constraint (Gap=0.2mm) (On the board ),(On the board )<br />Rule Violations :0<br /><br /><br />Violations Detected : 1<br />Time Elapsed : 00:00:11<br /><br />还是没弄懂，似乎跟最上面提示的那四个Pad有关吗？郁闷。。。 |
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