关于异步装载的移位寄存器

只看该作者 · 2007-11-16 17:20

各位,我想实现异步装载的移位寄存器,但是综合器却要把它综合成同步,咋办啊?
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Register shift_reg with async load is being synthesized in compatability mode. A Synthesis/Simulation mismatch is possible.
请求帮助...

只看该作者 · 2007-11-16 17:22

always @( negedge Txclk or negedge Load  )  //发送
begin
if(!Load)   // 异步装载数据
begin
    shift_reg <=mir_shift_reg;
end
else
  if(!Reset)
   begin
   start <=0;
   NextData<=0;
   WXR1 <=1;
   WXR2 <=1;
   end
  else
      if(!tempEn)   //enable to send
      begin
//       shift_reg <=mir_shift_reg;
       flag <=0;
       WXR1 <= 0;
       WXR2 <= 0;   //归零码
       start   <=1;
       cnt <=0;
       byteCnt <=0;
       stCnt   <=0;
      end
      else
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