1. Bachelor in Electrical/Electronic Engineering or higher
2. Very good knowledge of analog design rules, layout tools (cadence or laker), backend procedure (LVS, DRC, antenna, XOR), tapeout flow. 3. Familiar with digital P&R tools (Astro). Have knowledge on timing analysis, clock tree synthesis, power grid and power cap distribution, RC extraction
4. More than 3 years experience with analog
Location Beijing
hre@quintic.cn
http://www.quinticcorp.com/
相关链接:http://www.quinticcorp.com/ |
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