本帖最后由 石头记 于 2013-10-16 21:15 编辑
The MC74HC595A consists of an 8–bit shift register and an 8–bit
D–type latch with three–state parallel outputs. The shift register
accepts serial data and provides a serial output. The shift register also
provides parallel data to the 8–bit latch. The shift register and latch
have independent clock inputs. This device also has an asynchronous
reset for the shift register.
The HC595A directly interfaces with the SPI serial data port on
CMOS MPUs and MCUs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 328 FETs or 82 Equivalent Gates
• Improvements over HC595
— Improved Propagation Delays
— 50% Lower Quiescent Power
— Improved Input Noise and Latchup Immunity
595电压最高6V,你可稳压到5V,8个并行口以PCB布局就近原则接到对应的8个段（因为码表可自定义）数码管电压高的话再串入晶体管驱动，一个串行口接入下个一595的串行数据口，12个数码管要传12*8=96个时钟。3个IO口就可以了，如果要软件调亮度还要一个PWM输出口
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