always @(posedge clk)
begin
if(en)
begin
if(tempa) //为什么这里要改成if(!temp)
begin
tempa<=0;
case(astate)
red: begin astate<=green;rest_atime<=ini_agreen;alamp<=4'b0100;end
green: begin astate<=yellow_ag;rest_atime<=ini_ayellow;alamp<=4'b0010;end
yellow_ag:begin astate<=left;rest_atime<=ini_aleft;alamp<=4'b1000;end
left: begin astate<=yellow_al;rest_atime<=ini_ayellow;alamp<=4'b0001;end
yellow_al:begin astate<=red;rest_atime<=ini_ared;alamp<=1;end
default: begin astate<=red;alamp<=4'b0001;end
endcase
end
else
begin
if(rest_atime>1)
begin
if(rest_atime[3:0]==0)
begin
rest_atime[3:0]<=4'b1001;
rest_atime[7:4]<=rest_atime[7:4]-1;
end
else rest_atime[3:0]<=rest_atime[3:0]-1;
end
if(rest_atime==2)
tempa<=1; 这里改成temp<=0,为什么我取1就不可以
end
end
else
begin alamp<=1;astate<=red;tempa<=0;end
end
temp当为0有效时,状态改变,结果对。
但是我反过来,temp=1有效,改变状态,仿真输出0. 程序编译通过,谢谢大家
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