当置位SCICTL1寄存器中的SWRESET时,会将SCICTL2中的TXRDY位置位。
而TXRDY的说明文档中提到,TXRDY置位的时候,若中断使能TXINTENA=1,将会引发一个中断请求,我的SCIA初始化程序如下
void scia_init()
{
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCIHBAUD = 1;
SciaRegs.SCILBAUD = 231;
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
//外设级中断使能
SciaRegs.SCICTL2.bit.TXINTENA =1;
SciaRegs.SCICTL2.bit.RXBKINTENA =1;
// Enable interrupts required for this example
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, int1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
IER |= M_INT9; // Enable CPU INT
EINT;
SciaRegs.SCICTL1.bit.SWRESET=1; // Relinquish SCI from Reset
}
但是我跟踪代码当 SciaRegs.SCICTL1.bit.SWRESET=1;执行后,并没有引发中断,这是为什么?
坐等大神!! |