本帖最后由 FSL_TICS_A 于 2014-6-16 17:56 编辑
[size=11.724137306213379px] /***********************************************************************************************[size=11.724137306213379px]*
[size=11.724137306213379px]* @brief CLK_Init - Initialize the clocks to run at 20 MHz
[size=11.724137306213379px]* @param none
[size=11.724137306213379px]* @return none
[size=11.724137306213379px]*
[size=11.724137306213379px]************************************************************************************************/
[size=11.724137306213379px]void Clk_Init()
[size=11.724137306213379px]{
[size=11.724137306213379px]
[size=11.724137306213379px] ICS_C1|=ICS_C1_IRCLKEN_MASK; /* Enable the internal reference clock*/
[size=11.724137306213379px] ICS_C3= 0x90; /* Reference clock frequency = 31.25 KHz 参考频率怎么设置自己需要频率,手册真看不明白,请高手指点*/
[size=11.724137306213379px] while(!(ICS_S & ICS_S_LOCK_MASK)); /* Wait for PLL lock, now running at 40 MHz (1280 * 31.25Khz) 有的FLL倍频为什么又是1024,手册真看不明白,请高手指点*/
[size=11.724137306213379px] ICS_C2|=ICS_C2_BDIV(1) ; /*BDIV=2, Bus clock = 20 MHz*/
[size=11.724137306213379px] ICS_S |= ICS_S_LOCK_MASK ; /* Clear Loss of lock sticky bit */
[size=11.724137306213379px]
[size=11.724137306213379px]}
[size=11.724137306213379px]谢谢了
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