In this mode, the DIR direction bit in the TIMx_CR1 register cannot be written. It is updated
by hardware and gives the current direction of the counter
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ST的RM说,这种模式下DIR不可写,它自己控制。
In center-aligned mode, the counter counts from 0 to the auto-reload value (content of the
TIMx_ARR register) – 1, generates a counter overflow event, then counts from the autoreload
value down to 1 and generates a counter underflow event. Then it restarts counting
from 0.
它从0计数到ARR-1,产生溢出信号,然后从ARR计数到1,再产生一个溢出信号,然后再从0开始。。。。下一个周期。
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