/*******************FPGA与DSP通信**********************/
/****Config structure****/
#ifndef CONFIG_STRUCTURE
#define CONFIG_STRUCTURE
/* Transmit side EDMA configuration */
EDMA_Config gEdmaConfigXmt = {
EDMA_FMKS(OPT, PRI, HIGH) | // Priority
EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
EDMA_FMKS(OPT, SUM, INC) | // Src update mode
EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
EDMA_FMKS(OPT, DUM, NONE) | // Dest update mode
EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
EDMA_FMKS(OPT, FS, NO), // Use frame sync?
// Src address
EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count
EDMA_FMKS(DST, DST, OF(0)), // Dest address
EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value
EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
EDMA_FMK (RLD, LINK, NULL) // Reload link
};
/* Receive side EDMA configuration */
EDMA_Config gEdmaConfigRcv = {
EDMA_FMKS(OPT, PRI, HIGH) | // Priority
EDMA_FMKS(OPT, ESIZE, 16BIT) | // Element size
EDMA_FMKS(OPT, 2DS, NO) | // 2 dimensional source?
EDMA_FMKS(OPT, SUM, NONE) | // Src update mode
EDMA_FMKS(OPT, 2DD, NO) | // 2 dimensional dest
EDMA_FMKS(OPT, DUM, INC) | // Dest update mode
EDMA_FMKS(OPT, TCINT, YES) | // Cause EDMA interrupt?
EDMA_FMKS(OPT, TCC, OF(0)) | // Transfer complete code
EDMA_FMKS(OPT, LINK, YES) | // Enable link parameters?
EDMA_FMKS(OPT, FS, NO), // Use frame sync?
EDMA_FMKS(SRC, SRC, OF(0)), // Src address
EDMA_FMK (CNT, FRMCNT, NULL) | // Frame count
EDMA_FMK (CNT, ELECNT, BUFFSIZE), // Element count
[color=Magenta](Uint32)&gBufferRcvPing, // Dest address[/color]
EDMA_FMKS(IDX, FRMIDX, DEFAULT) | // Frame index value
EDMA_FMKS(IDX, ELEIDX, DEFAULT), // Element index value
EDMA_FMK (RLD, ELERLD, NULL) | // Reload element
EDMA_FMK (RLD, LINK, NULL) // Reload link
};
/* McBSP codec data channel configuration */
static MCBSP_Config mcbspCfg1 = {
MCBSP_FMKS(SPCR, FREE, NO) |
MCBSP_FMKS(SPCR, SOFT, NO) |
MCBSP_FMKS(SPCR, FRST, YES) |
MCBSP_FMKS(SPCR, GRST, YES) |
MCBSP_FMKS(SPCR, XINTM, XRDY) | //XINT输出中断由字结束和帧结束触发XRDY;
MCBSP_FMKS(SPCR, XSYNCERR, NO) |
MCBSP_FMKS(SPCR, XRST, YES) | // 串口输出使能;
MCBSP_FMKS(SPCR, DLB, OFF) | // 不使用内部反馈环;
MCBSP_FMKS(SPCR, RJUST, RZF) | // 右对齐,自动补零;
MCBSP_FMKS(SPCR, CLKSTP, DISABLE) | // 时钟停止模式,不使用SPI;
MCBSP_FMKS(SPCR, DXENA, OFF) | // DX不使能;
MCBSP_FMKS(SPCR, RINTM, RRDY) | // 接收中断模式,字结束或帧结束;
MCBSP_FMKS(SPCR, RSYNCERR, NO) |
MCBSP_FMKS(SPCR, RRST, YES), // 串口接收器停止工作,处于复位状态;
MCBSP_FMKS(RCR, RPHASE, SINGLE) | // 单相one phase数据;
MCBSP_FMKS(RCR, RFRLEN2, DEFAULT) | // 第二相默认;
MCBSP_FMKS(RCR, RWDLEN2, DEFAULT) | // 第二相默认;
MCBSP_FMKS(RCR, RCOMPAND, MSB) | // 数据不压缩;
MCBSP_FMKS(RCR, RFIG, NO) | // 接收帧同步信号不忽略第一个脉冲;
MCBSP_FMKS(RCR, RDATDLY, 0BIT) | // 接收数据延迟位0 bit;(1bit?)
MCBSP_FMKS(RCR, RFRLEN1, OF(1)) | // 接收帧长度1个字;
MCBSP_FMKS(RCR, RWDLEN1, 16BIT) | // 每个字16位;
MCBSP_FMKS(RCR, RWDREVRS, DISABLE), // 接收32位数据不翻转;
MCBSP_FMKS(XCR, XPHASE, SINGLE) |
MCBSP_FMKS(XCR, XFRLEN2, DEFAULT) |
MCBSP_FMKS(XCR, XWDLEN2, DEFAULT) |
MCBSP_FMKS(XCR, XCOMPAND, MSB) |
MCBSP_FMKS(XCR, XFIG, NO) |
MCBSP_FMKS(XCR, XDATDLY, 0BIT) |
MCBSP_FMKS(XCR, XFRLEN1, OF(1)) |
MCBSP_FMKS(XCR, XWDLEN1, 16BIT) |
MCBSP_FMKS(XCR, XWDREVRS, DISABLE),
MCBSP_FMKS(SRGR, GSYNC, DEFAULT) |
MCBSP_FMKS(SRGR, CLKSP, DEFAULT) |
MCBSP_FMKS(SRGR, CLKSM, CLKS) | // 采样速率发生器时钟外部clks输入;
MCBSP_FMKS(SRGR, FSGM, FSG) |
MCBSP_FMKS(SRGR, FPER, OF(0x00f)) | // 帧宽度16位;
MCBSP_FMKS(SRGR, FWID, DEFAULT) |
MCBSP_FMKS(SRGR, CLKGDV, OF(0x03)), // 4分频;
MCBSP_MCR_DEFAULT,
MCBSP_RCER_DEFAULT,
MCBSP_XCER_DEFAULT,
MCBSP_FMKS(PCR, XIOEN, SP) |
MCBSP_FMKS(PCR, RIOEN, SP) |
MCBSP_FMKS(PCR, FSXM, EXTERNAL) |
MCBSP_FMKS(PCR, FSRM, EXTERNAL) |
MCBSP_FMKS(PCR, CLKXM, INPUT) |
MCBSP_FMKS(PCR, CLKRM, INPUT) |
MCBSP_FMKS(PCR, CLKSSTAT, DEFAULT) |
MCBSP_FMKS(PCR, DXSTAT, DEFAULT) |
MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) |
MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) |
MCBSP_FMKS(PCR, CLKXP, FALLING) |
MCBSP_FMKS(PCR, CLKRP, RISING)
};
#endif