ITM机制浅析

#include <stdio.h>

int main()

{

        //硬件初始化

        //....

        printf("hello, world");

        for(;;);

}

#include <stdio.h>

#define ITM_Port8(n) (*((volatile unsigned char *)(0xE0000000+4*n)))

#define ITM_Port16(n) (*((volatile unsigned short*)(0xE0000000+4*n)))

#define ITM_Port32(n) (*((volatile unsigned long *)(0xE0000000+4*n)))

#define DEMCR (*((volatile unsigned long *)(0xE000EDFC)))

#define TRCENA 0x01000000

struct __FILE { int handle; /* Add whatever you need here */ };

    FILE __stdout;

    FILE __stdin;

int fputc(int ch, FILE *f) 

{

    if (DEMCR & TRCENA) 

    {

        while (ITM_Port32(0) == 0);

        ITM_Port8(0) = ch;

    }

    return(ch);

}

/******************************************************************************/

/* STM32DBG.INI: STM32 Debugger Initialization File */

/******************************************************************************/

// <<< Use Configuration Wizard in Context Menu >>> // 

/******************************************************************************/

/* This file is part of the uVision/ARM development tools. */

/* Copyright (c) 2005-2007 Keil Software. All rights reserved. */

/* This software may only be used under the terms of a valid, current, */

/* end user licence from KEIL for a compatible version of KEIL software */

/* development tools. Nothing else gives you the right to use this software. */

/******************************************************************************/

FUNC void DebugSetup (void) {

// <h> Debug MCU Configuration

// <o1.0> DBG_SLEEP <i> Debug Sleep Mode

// <o1.1> DBG_STOP <i> Debug Stop Mode

// <o1.2> DBG_STANDBY <i> Debug Standby Mode

// <o1.5> TRACE_IOEN <i> Trace I/O Enable 

// <o1.6..7> TRACE_MODE <i> Trace Mode

// <0=> Asynchronous

// <1=> Synchronous: TRACEDATA Size 1

// <2=> Synchronous: TRACEDATA Size 2

// <3=> Synchronous: TRACEDATA Size 4

// <o1.8> DBG_IWDG_STOP <i> Independant Watchdog Stopped when Core is halted

// <o1.9> DBG_WWDG_STOP <i> Window Watchdog Stopped when Core is halted

// <o1.10> DBG_TIM1_STOP <i> Timer 1 Stopped when Core is halted

// <o1.11> DBG_TIM2_STOP <i> Timer 2 Stopped when Core is halted

// <o1.12> DBG_TIM3_STOP <i> Timer 3 Stopped when Core is halted

// <o1.13> DBG_TIM4_STOP <i> Timer 4 Stopped when Core is halted

// <o1.14> DBG_CAN_STOP <i> CAN Stopped when Core is halted

// </h>

_WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR

_WDWORD(0xE000ED08, 0x20000000); // Setup Vector Table Offset Register

}

DebugSetup(); // Debugger Setup