#include <mega48.h>
#define DDR_IN 0
#define DDR_OUT 1
#define PORT_SEL PORTB
#define PIN_SEL PINB
#define DDR_SEL DDRB
#define PORT_SDI PORTB
#define PIN_SDI PINB
#define DDR_SDI DDRB
#define PORT_SCK PORTB
#define PIN_SCK PINB
#define DDR_SCK DDRB
#define PORT_SDO PORTB
#define PIN_SDO PINB
#define DDR_SDO DDRB
#define PORT_IRQ PORTD
#define PIN_IRQ PIND
#define DDR_IRQ DDRD
#define PORT_DATA PORTD
#define PIN_DATA PIND
#define DDR_DATA DDRD
#define PB7 7
#define PB6 6
#define RFXX_SCK 5
#define RFXX_SDO 4
#define RFXX_SDI 3
#define RFXX_SEL 2
#define NC 1
#define PB0 0
#define SEL_OUTPUT() DDR_SEL |= (1 << RFXX_SEL)
#define HI_SEL() PORT_SEL |= (1 << RFXX_SEL)
#define LOW_SEL() PORT_SEL &= ~(1 << RFXX_SEL)
#define SDI_OUTPUT() DDR_SDI |= (1 << RFXX_SDI)
#define HI_SDI() PORT_SDI |= (1 << RFXX_SDI)
#define LOW_SDI() PORT_SDI &= ~(1 << RFXX_SDI)
#define SDO_INPUT() DDR_SDO &= ~(1 << RFXX_SDO)
#define LOW_SDO() PORT_SDO &= (1 << RFXX_SDO)
#define SDO_HI() PIN_SDO & (1 << RFXX_SDO)
#define SCK_OUTPUT() DDR_SCK |= (1 << RFXX_SCK)
#define HI_SCK() PORT_SCK |= (1 << RFXX_SCK)
#define LOW_SCK() PORT_SCK &= ~(1 << RFXX_SCK)
#define RF12_IRQ 2
#define IRQ_IN() DDR_IRQ &= ~(1 << RF12_IRQ)
#define WAIT_IRQ_LOW() while(PIND & (1 << RF12_IRQ))
#define RF12_DATA 4
#define DATA_OUT() DDR_DATA |= (1 << RF12_DATA)
#define HI_DATA() PORT_DATA |= (1 << RF12_DATA)
#define LEDG_OUTPUT() DDRD |= ~(1 << 6)
#define LEDR_OUTPUT() DDRD |= ~(1 << 7)
#define LEDG_ON() PORTD &= ~(1 << 6)
#define LEDG_OFF() PORTD |= (1 << 6) //PORTD |= !(1<<6)
#define LEDR_ON() PORTD &= ~(1 << 7)
#define LEDR_OFF() PORTD |= (1 << 7) //
void RFXX_PORT_INIT (void)
{
HI_SEL();
HI_SDI();
LOW_SCK();
HI_DATA();
SEL_OUTPUT();
SDI_OUTPUT();
SDO_INPUT();
SCK_OUTPUT();
IRQ_IN();
DATA_OUT();
}
unsigned int RFXX_WRT_CMD (unsigned int aCmd)
{
unsigned char i;
unsigned int temp;
temp = 0;
LOW_SCK();
LOW_SEL();
for (i=0; i<16; i++)
{
if (aCmd & 0x8000)
{
HI_SDI();
}
else
{
LOW_SDI();
}
HI_SCK();
if (aCmd & 0x8000)
{
HI_SDI();
}
else
{
LOW_SDI();
}
HI_SCK();
temp <<= 1;
if (SDO_HI())
{
temp |= 0x0001;
}
LOW_SCK();
aCmd <<= 1;
};
HI_SEL();
return(temp);
}
void RF12_INIT (void)
{
RFXX_WRT_CMD(0x80E7);
RFXX_WRT_CMD(0x8239);
RFXX_WRT_CMD(0xA686);
RFXX_WRT_CMD(0xC647);
RFXX_WRT_CMD(0x94A0);
RFXX_WRT_CMD(0xC2AC);
RFXX_WRT_CMD(0xCA81);
RFXX_WRT_CMD(0xCED4);
RFXX_WRT_CMD(0xC483);
RFXX_WRT_CMD(0x98B0);
RFXX_WRT_CMD(0xCC67);
RFXX_WRT_CMD(0xE000);
RFXX_WRT_CMD(0xC800);
RFXX_WRT_CMD(0xC000);
/* RFXX_WRT_CMD(0x80D7);
RFXX_WRT_CMD(0x8239);
RFXX_WRT_CMD(0xA640);
RFXX_WRT_CMD(0xC647);
RFXX_WRT_CMD(0x94A0);
RFXX_WRT_CMD(0xC2AC);
RFXX_WRT_CMD(0xCA81);
// RFXX_WRT_CMD(0xCA83);
RFXX_WRT_CMD(0xC483);
RFXX_WRT_CMD(0x9850);
// RFXX_WRT_CMD(0xCC67);
RFXX_WRT_CMD(0xE000);
RFXX_WRT_CMD(0xC800);
RFXX_WRT_CMD(0xC400); */
}
unsigned char RF12_RECV (void)
{
unsigned int FIFO_data;
WAIT_IRQ_LOW();
RFXX_WRT_CMD(0x0000);
FIFO_data = RFXX_WRT_CMD(0xB000);
return(FIFO_data & 0x00FF);
}
void Delay_ms (unsigned char amS)
{
unsigned char i;
unsigned int j;
for (i=0; i<amS; i++)
{
for (j=0; j<914; j++);
}
}
void main(void)
{
unsigned char i;
unsigned char ChkSum;
LEDG_OFF();
LEDR_OFF();
LEDG_OUTPUT();
LEDR_OUTPUT();
for (i=0; i<3; i++)
{
Delay_ms(200);
LEDG_ON();
LEDR_ON();
Delay_ms(200);
LEDG_OFF();
LEDR_OFF();
}
LEDG_OFF();
LEDR_OFF();
RFXX_PORT_INIT();
RF12_INIT();
RFXX_WRT_CMD(0xCA81);
while (1)
{
RFXX_WRT_CMD(0xCA83);
ChkSum = 0;
for (i=0; i<16; i++)
{
ChkSum += RF12_RECV();
}
i = RF12_RECV();
RFXX_WRT_CMD(0xCA81);
if(ChkSum == i)
{
LEDG_ON();
Delay_ms(200);
LEDG_OFF();
}
}
} |