MSP430F5XXX 的I2C问题

只看该作者 · 2015-1-31 21:25

I2C通信，如果MCU作为主机时，必须要先发送从机地址，即 Slave addr + R/W。

但为什么我看TI给出的Example中，初始化从机地址（UCB0I2CSA寄存器）之后，直接就发出了START信号，

并没有向发送缓冲寄存器UCB0TXBUF中送任何数据？！

难道只要初始化从机地址，然后启动START，MCU就能自动将 Slave addr + W 发送给从机？？

附TI的Example:

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                // Stop WDT
  P3SEL |= 0x03;                         // Assign I2C pins to USCI_B0
  UCB0CTL1 |= UCSWRST;                   // Enable SW reset
  UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;    // I2C Master, synchronous mode
  UCB0CTL1 = UCSSEL_2 + UCSWRST;          // Use SMCLK, keep SW reset
  UCB0BR0 = 12;                            // fSCL = SMCLK/12 = ~100kHz
  UCB0BR1 = 0;
  UCB0I2CSA = 0x48;                      // Slave Address is 048h
  UCB0CTL1 &= ~UCSWRST;                   // Clear SW reset, resume operation
  UCB0IE |= UCTXIE;                      // Enable TX interrupt

  TXData = 0x01;                         // Holds TX data

  while (1)
  {
TXByteCtr = 1;                         // Load TX byte counter

while (UCB0CTL1 & UCTXSTP);          // Ensure stop condition got sent
UCB0CTL1 |= UCTR + UCTXSTT;          // I2C TX, start condition

__bis_SR_register(LPM0_bits + GIE);    // Enter LPM0 w/ interrupts
__no_operation();                      // Remain in LPM0 until all data
                                       // is TX'd

TXData++;                            // Increment data byte
  }
}

//------------------------------------------------------------------------------
// The USCIAB0_ISR is structured such that it can be used to transmit any
// number of bytes by pre-loading TXByteCtr with the byte count.
//------------------------------------------------------------------------------
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCB0IV,12))
  {
  case  0: break;                         // Vector  0: No interrupts
  case  2: break;                         // Vector  2: ALIFG
  case  4: break;                         // Vector  4: NACKIFG
  case  6: break;                         // Vector  6: STTIFG
  case  8: break;                         // Vector  8: STPIFG
  case 10: break;                         // Vector 10: RXIFG
  case 12:                               // Vector 12: TXIFG
if (TXByteCtr)                         // Check TX byte counter
{
   UCB0TXBUF = TXData;                // Load TX buffer
   TXByteCtr--;                         // Decrement TX byte counter
}
else
{
   UCB0CTL1 |= UCTXSTP;                // I2C stop condition
   UCB0IFG &= ~UCTXIFG;                // Clear USCI_B0 TX int flag
   __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
}
break;
  default: break;
  }
}