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唉！<br /><br />Syntax<br />FMRRS{cond} Rd, Rn, {Sn,Sm}<br />FMSRR{cond} {Sn,Sm}, Rd, Rn<br />where:<br />cond is an optional condition code (see VFP and condition codes on page 6-8).<br />Sn, Sm are two consecutive VFP single-precision registers.<br />Rd, Rn are the ARM registers. Do not use r15.
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