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发表于 2015-3-26 19:56

使用68013的slave FIFO模式来传输数据，上位机发送数据，下位可以准确收到，但是下位机给上位机发送数据，则显示2次成功，然后一直失败，弄了好久，不知其原因。

发表于 2015-3-26 19:57

估计你的初始化配置有问题

发表于 2015-3-26 19:58

等会，那我把初始化的代码贴上来给大家看看

发表于 2015-3-26 19:59

void TD_Init( void )
{
  CPUCS = 0x12;
  IFCONFIG = 0x43;

  PORTACFG = 0x40;
  SYNCDELAY;
  FIFOPINPOLAR = 0x00;  // set all slave FIFO interface pins as active low PKTEND OR SLOE SLWR LOW AVTIVE
  SYNCDELAY;
  REVCTL = 0x03;       // enable the external master

  SYNCDELAY;          //reset the fifos
  FIFORESET = 0x80;
  SYNCDELAY;
  FIFORESET = 0x02;
  SYNCDELAY;
  FIFORESET = 0x04;
  SYNCDELAY;
  FIFORESET = 0x06;
  SYNCDELAY;
  FIFORESET = 0x08;
  SYNCDELAY;
  FIFORESET = 0x00;

  SYNCDELAY;
  PINFLAGSAB = 0x00;       // PINFLAGSAB = 0xE0; FLAGA - indexed, FLAGB - EP6 FF ；
  SYNCDELAY;
  PINFLAGSCD = 0x00;       // PINFLAGSCD = 0x08; FLAGC - EP2 EF, FLAGD - indexed；

  SYNCDELAY;                   // config the endpoints direction
  EP1OUTCFG = 0xA0;       //enable and bulk type
  EP1INCFG =  0xA0;

  SYNCDELAY;                   // see TRM section 15.14
  EP2CFG = 0xA0;
  SYNCDELAY;
  EP8CFG = 0xE0;
  SYNCDELAY;
  EP4CFG = 0x00;
  SYNCDELAY;
  EP6CFG = 0x00;
  SYNCDELAY;
  OUTPKTEND = 0X82;          //arming endpoint 2, perform OUTPKTEND 4 times since EP2 is 4x buffered
  SYNCDELAY;
  OUTPKTEND = 0X82;
  SYNCDELAY;
  OUTPKTEND = 0X82;
  SYNCDELAY;
  OUTPKTEND = 0X82;
  SYNCDELAY;
  EP2FIFOCFG = 0x10;       //EP IS AUTOOUT=0 AUTOIN =1 ZEROLEN=1 WORDIDE=0
  SYNCDELAY;
  EP8FIFOCFG = 0x08;       //EP IS AUTOOUT=0 AUTOIN =1 ZEROLEN=1 WORDIDE=0
  SYNCDELAY;
  INPKTEND = 0x08;
  SYNCDELAY;
  INPKTEND = 0x08;
  SYNCDELAY;
  EP8AUTOINLENH = 0x02; //set the packet size 512
  SYNCDELAY;
  EP8AUTOINLENL = 0x00;
  SYNCDELAY;

  EP2BCL = 0x80;             // arm EP2OUT by writing byte count w/skip.
  SYNCDELAY;
  EP2BCL = 0x80;
  SYNCDELAY;
}

发表于 2015-3-26 20:00

下位机传到PC，属于IN传输，首先要确认IN Endpoint配置是否有问题。

发表于 2015-3-26 20:01

你可以设置成AUTOIN模式，EPxAUTOINLENH来设置要传输的数据大小。

发表于 2015-3-26 20:02

FIFO端点在Auto-In模式可以如下，数据手册也有说道:
1. Configure bits IFCONFIG[7:4] to define the behavior of
the interface clock.
2. Set bits IFCFG1:0=11.
3. Set REVCTL.0 and REVCTL.1 to ‘1’.
4. Configure EPxCFG.
5. Reset the FIFOs.
6. Set bit EPxFIFOCFG.3=1.
7. Set the size through the EPxAUTOINLENH registers.

发表于 2015-3-26 20:03

你是不是还在搞usb啊？这个好像是fifo满了吧，后面不能发送了

发表于 2015-3-26 20:04

哦，我明白了，多谢

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