General Description
S3C6400 is a 32-bit RISC microprocessor, which is designed to provide a cost-effective, low power, high performance Application Processor solution for mobile phones and general applications.
To provide optimized H/W performance for the 2.5G & 3G communication services, S3C6400 adopts a 64/32-bit internal bus architecture which is composed of AXI, AHB and APB buses, and includes many powerful hardware accelerators for tasks such as motion video processing, audio processing, 2D graphics, display manipulation and scaling. An Integrated Multi Format Codec (MFC) supports encoding and decoding of MPEG4/H.263/H.264 and decoding of VC1. This H/W Encoder/ Decoder supports real-time video conferencing and TV signal output in NTSC and all PAL formats.
The S3C6400 has an optimized interface to external memory capable of sustaining the demanding memory bandwidths required in high-end communication services. The memory system has dual external memory ports: a DRAM and a Flash/ROM/DRAM port. The DRAM port can be configured to support mobile DDR, DDR, mobile SDRAM and standard SDRAM.
The Flash/ROM/DRAM Port supports SLC/MLC type NAND Flash both, NOR-Flash, OneNAND, CF and ROM type external memory and mobile DDR, DDR, mobile SDRAM and SDRAM
To reduce total system cost and enhance overall functionality, S3C6400 includes many hardware peripherals such as camera interface, TFT 24-bit true color LCD controller, System Manager( power management & etc.), 4-channel UART, 32-channel DMA, 4-channel Timers, General I/O Ports, I2S-Bus Interface, I2C-BUS interface, USB Host, USB OTG operating at high speed(480Mbps), SD Host & High Speed Multi-Media Card Interface and PLLs for clock generation.
POP (Package on Package) option with MCP is available for small form factor applications.
Features
ARM1176JZF-S based CPU Subsystem with Java acceleration Engine
16/16KB I/D Cache, 16/16KB I/D TCM
533/667MHz Operating Frequency
One 8-bit ITU 601/656 Camera Interface of up to 4M pixel for scaled and 16M pixel for un-scaled resolution
Multi Format CODEC (MFC) provides encoding and decoding of MPEG-4/H.263/H.264 up to 30fps@SD, and decoding of VC1 video up to 30fps@SD
2D Graphics Acceleration with BitBlt and Rotation
AC-97 audio codec interface and PCM serial audio interface
1/2/4/8 bpp Palletized or 16/24bpp Non-Palletized Color-TFT support up to 1024x1024
I2S, I2C interface support
Dedicated IrDA port for FIR, MIR and SIR
Flexibly configurable GPIOs
1-port USB OTG 2.0 supporting high speed(480Mbps, on-chip transceiver)
1-port USB 1.1 Host supporting full speed(12Mbps, on-chip transceiver)
High Speed-MMC/SD card support
Real time clock, PLL, timer with PWM and watch dog timer
32 channel DMA controller
Support 8X8 key matrix
Advanced power management for mobile applications
Memory Subsystem
- SRAM/ROM/NOR/NAND(SLC/MLC) Interface with x8 or x16 data bus
- Muxed OneNAND Interface with x16 data bus
- SDRAM / Mobile SDRAM Interface with x16 or x32 data bus (133Mbps/pin rate)
- Mobile DDR Interface with x16 or x32 data bus (266Mbps/pin DDR)
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