第一次画PCB，导入网表出现错误

只看该作者 · 2015-4-16 13:26

导入网表出现错误，按照提示是引脚定义问题，已改封装的引脚仍出现错误，反复试了好几次，没有解决，
求指导cadence16.6
netrew.lit如下
(---------------------------------------------------------------------)
(                                                                   )
( Allegro Netrev Import Logic                                     )
(                                                                   )
( Drawing       : TIME_ZKLH.brd                               )
( Software Version : 16.6P004                                     )
( Date/Time       : Thu Apr 16 13:04:42 2015                   )
(                                                                   )
(---------------------------------------------------------------------)

------ Directives ------

RIPUP_ETCH FALSE;
RIPUP_DELETE_FIRST_SEGMENT FALSE;
RIPUP_RETAIN_BONDWIRE FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'E:/program/MY FIRST/MB91F522K TIME/allegro';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'E:/program/MY FIRST/MB91F522K TIME/borad/TIME_ZKLH.brd';
NEW_BOARD_NAME 'E:/program/MY FIRST/MB91F522K TIME/borad/TIME_ZKLH.brd';

CmdLine: netrev -$ -i E:/program/MY FIRST/MB91F522K TIME/allegro -y 1 E:/program/MY FIRST/MB91F522K TIME/borad/#Taaaaab64244.tmp

------ Preparing to read pst files ------

Starting to read E:/program/MY FIRST/MB91F522K TIME/allegro/pstchip.dat
Finished reading E:/program/MY FIRST/MB91F522K TIME/allegro/pstchip.dat (00:00:00.27)
Starting to read E:/program/MY FIRST/MB91F522K TIME/allegro/pstxprt.dat
Finished reading E:/program/MY FIRST/MB91F522K TIME/allegro/pstxprt.dat (00:00:00.03)
Starting to read E:/program/MY FIRST/MB91F522K TIME/allegro/pstxnet.dat
Finished reading E:/program/MY FIRST/MB91F522K TIME/allegro/pstxnet.dat (00:00:00.08)

------ Oversights/Warnings/Errors ------

#1 WARNING(SPMHNI-192): Device/Symbol check warning detected. [help]

ERROR(SPMHNI-196): Symbol 'LEDC3528X180M' for device '1N6264/TO_LEDC3528X180M_1N6264/' has extra pin 'C'.

ERROR(SPMHNI-196): Symbol 'LEDC3528X180M' for device '1N6264/TO_LEDC3528X180M_1N6264/' has extra pin 'A'.

ERROR(SPMHNI-195): Symbol 'LEDC3528X180M' for device '1N6264/TO_LEDC3528X180M_1N6264/' is missing pin '3'.

ERROR(SPMHNI-195): Symbol 'LEDC3528X180M' for device '1N6264/TO_LEDC3528X180M_1N6264/' is missing pin '1'.

------ Library Paths ------
MODULEPATH =  .
         C:/Cadence/SPB_16.6/share/local/pcb/modules

PSMPATH =  .
         symbols
         ..
         ../symbols
         C:/Cadence/SPB_16.6/share/local/pcb/symbols
         C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols
         C:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols
         E:/program/MY FIRST/footprint/pad/
         E:/program/MY FIRST/fp/pad/
         E:/program/MY FIRST/time/sysm bol/
         E:/program/MY FIRST/footprint/
         E:/program/MY FIRST/fp/
         E:/program/MY FIRST/time/

PADPATH =  .
         symbols
         ..
         ../symbols
         C:/Cadence/SPB_16.6/share/local/pcb/padstacks
         C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols
         C:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols
         E:/program/MY FIRST/mypcblib/
         E:/program/MY FIRST/footprint/
         E:/program/MY FIRST/fp/

------ Summary Statistics ------

netrev run on Apr 16 13:04:42 2015
DESIGN NAME : 'MB91F522K TIME'
PACKAGING ON Sep 10 2012 04:46:09

COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON

No error detected
No oversight detected
  1 warnings detected

cpu time    0:03:01
elapsed time  0:00:01