给你一份,从ADS代码改的,已经用过
#include "option.s79"
;Interrupt Controller
INTMSK DEFINE 0x01e0000c
I_ISPC DEFINE 0x01e00024
;Watchdog Timer
WTCON DEFINE 0x01d30000
;Clock Controller
PLLCON DEFINE 0x01d80000
CLKCON DEFINE 0x01d80004
LOCKTIME DEFINE 0x01d8000c
;BDMA
BDIDES0 DEFINE 0x01f80008
BDIDES1 DEFINE 0x01f80028
;Pre-defined Constants
FIQMODE DEFINE 0x11
IRQMODE DEFINE 0x12
SVCMODE DEFINE 0x13
MODEMASK DEFINE 0x1f
NOINT DEFINE 0xc0
;**********************
; Module ?RESET *
;**********************
MODULE ?RESET ; begins a LIBRARY module: ?RESET. MODULE can also be LIBRARY
COMMON INTVEC:CODE:NOROOT(2)
PUBLIC __program_start
PUBLIC RelocatedExceptionVectorStart, RelocatedExceptionVectorEnd
EXTERN ?cstartup
EXTERN __HaltUndef, __HaltSwi, __HaltPAbort
EXTERN __HaltDAbort, __HaltIrq, __HaltFiq
EXTERN C_IRQHandler
CODE32
__program_start
ldr pc,=?cstartup ;Reset Handler
ldr pc,=0x0c7fff04 ;Undefined Instruction Handler
ldr pc,=0x0c7fff08 ;Software Interrupt Handler
ldr pc,=0x0c7fff0c ;Prefetch Abort Handler
ldr pc,=0x0c7fff10 ;Data Abort Handler
b .
ldr pc,=0x0c7fff18 ;IRQ Handler
ldr pc,=0x0c7fff1c ;FIQ Handler
LTORG
RelocatedExceptionVectorStart
mov pc,#0
ldr pc,=__HaltUndef
ldr pc,=__HaltSwi
ldr pc,=__HaltPAbort
ldr pc,=__HaltDAbort
b .
ldr pc,=C_IRQHandler
ldr pc,=__HaltFiq
LTORG
RelocatedExceptionVectorEnd
ENDMOD
;*************************
; Module ?CSTARTUP *
;*************************
MODULE ?CSTARTUP
RSEG IRQ_STACK:DATA(2)
RSEG FIQ_STACK:DATA(2)
RSEG SVC_STACK:DATA:NOROOT(2)
RSEG CSTACK:DATA(2)
RSEG ICODE:CODE:NOROOT(2)
PUBLIC ?cstartup
EXTERN ?main
EXTERN RelocatedExceptionVectorStart, RelocatedExceptionVectorEnd
CODE32
?cstartup
ldr r0,=WTCON ;disable watchdog
ldr r1,=0x0
str r1,[r0]
ldr r0,=INTMSK
ldr r1,=0x07ffffff ;mask all interrupts
str r1,[r0]
ldr r0,=I_ISPC
ldr r1,=0x03ffffff ;clear all pending bits
str r1,[r0]
ldr r0,=LOCKTIME ;configure PLL and clocks
ldr r1,=0xfff
str r1,[r0]
ldr r0,=PLLCON
ldr r1,=((M_DIV<<12)+(P_DIV<<4)+S_DIV)
str r1,[r0] ;Fin=8MHz, Fout=50MHz
ldr r0,=CLKCON
ldr r1,=0x7ff8 ;MCLK enabled for all unit block
str r1,[r0]
ldr r0,=BDIDES0 ;change BDMACON reset value for BDMA0
ldr r1,=0x40000000
str r1,[r0]
ldr r0,=BDIDES1 ;change BDMACON reset value for BDMA1
ldr r1,=0x40000000
str r1,[r0]
;Initialize Memory Controller
ldr r0,=SMRDATA ;load link-time address of SMRDATA
ldmia r0,{r1-r13} ;load SMRDATA to r1~r13
ldr r0,=0x01c80000 ;BWSCON, 1st register of memory controller
stmia r0,{r1-r13} ;store data in r1~r13 to registers of memory controller
;Relocate Exception Vectors
adr r0, RelocatedExceptionVectorStart
ldr r2, =0x0c7fff00 ; install interrupt vectors
adr r3, RelocatedExceptionVectorEnd
CopyVectors
cmp r0, r3
ldrcc r1, [r0], #4
strcc r1, [r2], #4
bcc CopyVectors
;Initialize Stack Pointers
mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQ Mode
ldr sp,=SFE(IRQ_STACK)&0xFFFFFFF8
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQ Mode
ldr sp,=SFE(FIQ_STACK)&0xFFFFFFF8
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVC Mode
ldr sp,=SFE(SVC_STACK)&0xFFFFFFF8
ldr r0,=?main
bx r0
LTORG
SMRDATA
DCD 0x11111100 ;Bank0=OM[1:0]; Bank1=8bit,Bank2,3,4,5,6,7=16bit;Bank4,5=SRAM
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
DCD 0x00 ;SCLK for reducing power consumption, BANKSIZE 32M/32M
DCD 0x20 ;CAS Latency=2clk
DCD 0x20 ;CAS Latency=2clk
ENDMOD
END
|
|
楼主
标题置顶
标题高亮
