怎么改也读不上数据来

1万 · 2015-5-19 22:43

买了ezusb-fx2，想把EP0设为bulkin，4x1024buffer，但怎么改也读不上数据来，以下是我的固件程序中
  void TD_Init(void)          // Called once at startup
{
// set the CPU clock to 48MHz
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
IFCONFIG |= 0x0B;//异步，从FIFO模式.
PORTACFG |= 0x00;//选择SLCSA功能脚。
FIFOPINPOLAR = 0x00; // set all slave FIFO interface pins as active low PKTEND OR SLOE SLWR LOW AVTIVE
SYNCDELAY;
REVCTL = 0x03; // enable the external master
SYNCDELAY;
//reset the fifos
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = 0x02;
SYNCDELAY;
FIFORESET = 0x04;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x08;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;

//fix the slave fifo flags, only flagb and flagc
PINFLAGSAB = 0x89;  //F,FLAGB IS THE FIFO2 EMPTY FLAG,LAGA IS THE FIFO4 EMPTY FLAG
SYNCDELAY;
// config the endpoints direction
EP1OUTCFG = 0xA0;//enable and bulk type
EP1INCFG = 0xA0;
SYNCDELAY;                   // see TRM section 15.14

//EP2CFG Endpoint 2 Configuration VALID DIR TYPE1 TYPE0 SIZE 0 BUF1 BUF0
//端点2配置，OUT，双缓冲，BULK
//0xA0 四缓冲
//0xA2 双缓冲
//0xA3 三缓冲
SYNCDELAY;
EP2CFG = 0xE0;    // EP2IN, bulk, size 1024, 4x buffered
SYNCDELAY;
EP4CFG = 0x00;    // EP4 not valid
SYNCDELAY;
EP6CFG = 0x00;    // EP6 not valid
SYNCDELAY;
EP8CFG = 0x00;    // EP8 not valid
SYNCDELAY;

EP2FIFOCFG = 0x0D;//EP2 IS AUTOOUT=0 AUTOIN =1 ZEROLEN=1 WORDIDE=1 配置EP2自动方式16位总
SYNCDELAY;

INPKTEND = 0x06;
SYNCDELAY;
INPKTEND = 0x06;
SYNCDELAY;
EP2AUTOINLENH = 0x02; //set the packet size 512
SYNCDELAY;
EP2AUTOINLENL = 0x00;
SYNCDELAY;
}
只修改了这个函数的内容；其他的和例程里slave fifo16的固件程序一样，FPGA的程序只改了PA[5:4] = 00表示写入端点0，上位机的程序，将EzusbShortdataIn中那个bulkControl.pipeNum设为0x00，表示从端点0读入，但怎么也读不上来。。。。
请高手们帮帮忙吧！！！小弟快急死了！！！