|
最近在做U-BOOT移植到S3C2410的移植，但是发现编译了U-BOOT-1.2.0下载的开发板上面以后，完全没反应。开发板是没有 norflash的，手里也只有一根wiggler，所以也不知道怎么单步调试。所以就想到的传说中的“点灯**”，就是在/cpu/arm920t /start.S中用汇编写一个死循环，在进行完CPU初始化以后，不断的点亮一个LED，但是发现这样也不成功。实在是没办法了。把start.s中的代码发上来。<br /><br />#include <config.h><br />#include <version.h><br /><br />/*<br />*************************************************************************<br />*<br />* Jump vector table as in table 3.1 in [1]<br />*<br />*************************************************************************<br />*/<br /><br />.globl _start<br />_start: b reset<br /> ldr pc, _undefined_instruction<br /> ldr pc, _software_interrupt<br /> ldr pc, _prefetch_abort<br /> ldr pc, _data_abort<br /> ldr pc, _not_used<br /> ldr pc, _irq<br /> ldr pc, _fiq<br /><br />_undefined_instruction: .word undefined_instruction<br />_software_interrupt: .word software_interrupt<br />_prefetch_abort: .word prefetch_abort<br />_data_abort: .word data_abort<br />_not_used: .word not_used<br />_irq: .word irq<br />_fiq: .word fiq<br /><br /> .balignl 16,0xdeadbeef<br /><br /><br />/*<br />*************************************************************************<br />*<br />* Startup Code (reset vector)<br />*<br />* do important init only if we don't start from memory!<br />* relocate armboot to ram<br />* setup stack<br />* jump to second stage<br />*<br />*************************************************************************<br />*/<br /><br />_TEXT_BASE:<br /> .word TEXT_BASE<br /><br />.globl _armboot_start<br />_armboot_start:<br /> .word _start<br /><br />/*<br />* These are defined in the board-specific linker script.<br />*/<br />.globl _bss_start<br />_bss_start:<br /> .word __bss_start<br /><br />.globl _bss_end<br />_bss_end:<br /> .word _end<br /><br />#ifdef CONFIG_USE_IRQ<br />/* IRQ stack memory (calculated at run-time) */<br />.globl IRQ_STACK_START<br />IRQ_STACK_START:<br /> .word 0x0badc0de<br /><br />/* IRQ stack memory (calculated at run-time) */<br />.globl FIQ_STACK_START<br />FIQ_STACK_START:<br /> .word 0x0badc0de<br />#endif<br /><br /><br />/*<br />* the actual reset code<br />*/<br /><br />reset:<br /> /*<br /> * set the cpu to SVC32 mode<br /> */<br /> mrs r0,cpsr<br /> bic r0,r0,#0x1f<br /> orr r0,r0,#0xd3<br /> msr cpsr,r0<br /><br />/* turn off the watchdog */<br />#if defined(CONFIG_S3C2400)<br /># define pWTCON 0x15300000<br /># define INTMSK 0x14400008 /* Interupt-Controller base addresses */<br /># define CLKDIVN 0x14800014 /* clock divisor register */<br />#elif defined(CONFIG_S3C2410)<br /># define pWTCON 0x53000000<br /># define INTMSK 0x4A000008 /* Interupt-Controller base addresses */<br /># define INTSUBMSK 0x4A00001C<br /># define CLKDIVN 0x4C000014 /* clock divisor register */<br />#endif<br /><br />#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)<br /> ldr r0, =pWTCON<br /> mov r1, #0x0<br /> str r1, [r0]<br /><br /> /*<br /> * mask all IRQs by setting all bits in the INTMR - default<br /> */<br /> mov r1, #0xffffffff<br /> ldr r0, =INTMSK<br /> str r1, [r0]<br /># if defined(CONFIG_S3C2410)<br /> ldr r1, =0x3ff<br /> ldr r0, =INTSUBMSK<br /> str r1, [r0]<br /># endif<br /><br /> /* FCLK:HCLK:PCLK = 1:2:4 */<br /> /* default FCLK is 120 MHz ! */<br /> ldr r0, =CLKDIVN<br /> mov r1, #3<br /> str r1, [r0]<br />#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */<br /><br /> /*<br /> * we do sys-critical inits only at reboot,<br /> * not when booting from ram!<br /> */<br />#ifndef CONFIG_SKIP_LOWLEVEL_INIT<br /> bl cpu_init_crit<br />#endif<br />/*这是我自己加的代码*************************<br /><br /><br />*****************************************/<br />#define GPFCON 0x56000050<br />#define GPFDAT 0x56000054<br /><br /> mov r1, #0x0100<br /> ldr r0, =GPFCON<br /> str r1,[r0]<br /><br />led:<br /> mov r1, #0x10<br /> ldr r0,=GPFDAT<br /> str r1,[r0]<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> nop<br /> mov r1,#0x00<br /><br /><br />#ifndef CONFIG_SKIP_RELOCATE_UBOOT<br />relocate: /* relocate U-Boot to RAM */<br /> adr r0, _start /* r0 <- current position of code */<br /> ldr r1, _TEXT_BASE /* test if we run from flash or RAM */<br /> cmp r0, r1 /* don't reloc during debug */<br /> beq stack_setup<br /><br /> ldr r2, _armboot_start<br /> ldr r3, _bss_start<br /> sub r2, r3, r2 /* r2 <- size of armboot */<br /> add r2, r0, r2 /* r2 <- source end address */<br /><br />copy_loop:<br /> ldmia r0!, {r3-r10} /* copy from source address [r0] */<br /> stmia r1!, {r3-r10} /* copy to target address [r1] */<br /> cmp r0, r2 /* until source end addreee [r2] */<br /> ble copy_loop<br />#endif /* CONFIG_SKIP_RELOCATE_UBOOT */<br /><br /> /* Set up the stack */<br />stack_setup:<br /> ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */<br /> sub r0, r0, #CFG_MALLOC_LEN /* malloc area */<br /> sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */<br />#ifdef CONFIG_USE_IRQ<br /> sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)<br />#endif<br /> sub sp, r0, #12 /* leave 3 words for abort-stack */<br /><br />clear_bss:<br /> ldr r0, _bss_start /* find start of bss segment */<br /> ldr r1, _bss_end /* stop here */<br /> mov r2, #0x00000000 /* clear */<br /><br />clbss_l:str r2, [r0] /* clear loop... */<br /> add r0, r0, #4<br /> cmp r0, r1<br /> ble clbss_l<br /><br />#if 0<br /> /* try doing this stuff after the relocation */<br /> ldr r0, =pWTCON<br /> mov r1, #0x0<br /> str r1, [r0]<br /><br /> /*<br /> * mask all IRQs by setting all bits in the INTMR - default<br /> */<br /> mov r1, #0xffffffff<br /> ldr r0, =INTMR<br /> str r1, [r0]<br /><br /> /* FCLK:HCLK:PCLK = 1:2:4 */<br /> /* default FCLK is 120 MHz ! */<br /> ldr r0, =CLKDIVN<br /> mov r1, #3<br /> str r1, [r0]<br /> /* END stuff after relocation */<br />#endif<br /><br /> ldr pc, _start_armboot<br /><br />_start_armboot: .word start_armboot<br /><br /><br />/*<br />*************************************************************************<br />*<br />* CPU_init_critical registers<br />*<br />* setup important registers<br />* setup memory timing<br />*<br />*************************************************************************<br />*/<br /><br /><br />#ifndef CONFIG_SKIP_LOWLEVEL_INIT<br />cpu_init_crit:<br /> /*<br /> * flush v4 I/D caches<br /> */<br /> mov r0, #0<br /> mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */<br /> mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */<br /><br /> /*<br /> * disable MMU stuff and caches<br /> */<br /> mrc p15, 0, r0, c1, c0, 0<br /> bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)<br /> bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)<br /> orr r0, r0, #0x00000002 @ set bit 2 (A) Align<br /> orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache<br /> mcr p15, 0, r0, c1, c0, 0<br /><br /> /*<br /> * before relocating, we have to setup RAM timing<br /> * because memory timing is board-dependend, you will<br /> * find a lowlevel_init.S in your board directory.<br /> */<br /> mov ip, lr<br /> bl lowlevel_init<br /> mov lr, ip<br /> mov pc, lr<br />#endif /* CONFIG_SKIP_LOWLEVEL_INIT */<br /><br />/*<br />*************************************************************************<br />*<br />* Interrupt handling<br />*<br />*************************************************************************<br />*/<br /><br />@<br />@ IRQ stack frame.<br />@<br />#define S_FRAME_SIZE 72<br /><br />#define S_OLD_R0 68<br />#define S_PSR 64<br />#define S_PC 60<br />#define S_LR 56<br />#define S_SP 52<br /><br />#define S_IP 48<br />#define S_FP 44<br />#define S_R10 40<br />#define S_R9 36<br />#define S_R8 32<br />#define S_R7 28<br />#define S_R6 24<br />#define S_R5 20<br />#define S_R4 16<br />#define S_R3 12<br />#define S_R2 8<br />#define S_R1 4<br />#define S_R0 0<br /><br />#define MODE_SVC 0x13<br />#define I_BIT 0x80<br /><br />/*<br />* use bad_save_user_regs for abort/prefetch/undef/swi ...<br />* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling<br />*/<br /><br /> .macro bad_save_user_regs<br /> sub sp, sp, #S_FRAME_SIZE<br /> stmia sp, {r0 - r12} @ Calling r0-r12<br /> ldr r2, _armboot_start<br /> sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)<br /> sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack<br /> ldmia r2, {r2 - r3} @ get pc, cpsr<br /> add r0, sp, #S_FRAME_SIZE @ restore sp_SVC<br /><br /> add r5, sp, #S_SP<br /> mov r1, lr<br /> stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr<br /> mov r0, sp<br /> .endm<br /><br /> .macro irq_save_user_regs<br /> sub sp, sp, #S_FRAME_SIZE<br /> stmia sp, {r0 - r12} @ Calling r0-r12<br /> add r8, sp, #S_PC<br /> stmdb r8, {sp, lr}^ @ Calling SP, LR<br /> str lr, [r8, #0] @ Save calling PC<br /> mrs r6, spsr<br /> str r6, [r8, #4] @ Save CPSR<br /> str r0, [r8, #8] @ Save OLD_R0<br /> mov r0, sp<br /> .endm<br /><br /> .macro irq_restore_user_regs<br /> ldmia sp, {r0 - lr}^ @ Calling r0 - lr<br /> mov r0, r0<br /> ldr lr, [sp, #S_PC] @ Get PC<br /> add sp, sp, #S_FRAME_SIZE<br /> subs pc, lr, #4 @ return & move spsr_svc into cpsr<br /> .endm<br /><br /> .macro get_bad_stack<br /> ldr r13, _armboot_start @ setup our mode stack<br /> sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)<br /> sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack<br /><br /> str lr, [r13] @ save caller lr / spsr<br /> mrs lr, spsr<br /> str lr, [r13, #4]<br /><br /> mov r13, #MODE_SVC @ prepare SVC-Mode<br /> @ msr spsr_c, r13<br /> msr spsr, r13<br /> mov lr, pc<br /> movs pc, lr<br /> .endm<br /><br /> .macro get_irq_stack @ setup IRQ stack<br /> ldr sp, IRQ_STACK_START<br /> .endm<br /><br /> .macro get_fiq_stack @ setup FIQ stack<br /> ldr sp, FIQ_STACK_START<br /> .endm<br /><br />/*<br />* exception handlers<br />*/<br /> .align 5<br />undefined_instruction:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_undefined_instruction<br /><br /> .align 5<br />software_interrupt:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_software_interrupt<br /><br /> .align 5<br />prefetch_abort:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_prefetch_abort<br /><br /> .align 5<br />data_abort:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_data_abort<br /><br /> .align 5<br />not_used:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_not_used<br /><br />#ifdef CONFIG_USE_IRQ<br /><br /> .align 5<br />irq:<br /> get_irq_stack<br /> irq_save_user_regs<br /> bl do_irq<br /> irq_restore_user_regs<br /><br /> .align 5<br />fiq:<br /> get_fiq_stack<br /> /* someone ought to write a more effiction fiq_save_user_regs */<br /> irq_save_user_regs<br /> bl do_fiq<br /> irq_restore_user_regs<br /><br />#else<br /><br /> .align 5<br />irq:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_irq<br /><br /> .align 5<br />fiq:<br /> get_bad_stack<br /> bad_save_user_regs<br /> bl do_fiq<br /><br />#endif<br /><br /> |
|
楼主
