| 
 
| void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div ) {
 u32 Tmp = 0;
 
 if (RCCU_FrequencyValue(RCCU_CLK2)>3000000)
 RCCU->PLL1CR|=RCCU_FREEN_Mask;
 else
 RCCU->PLL1CR&=~RCCU_FREEN_Mask;
 
 Tmp = ( RCCU->PLL1CR & ~RCCU_MX_Mask ) | ( New_Mul << RCCU_MX_Index );
 RCCU->PLL1CR = ( Tmp & ~RCCU_DX_Mask ) | New_Div | 0x40;
 }
 | 
 |