[DemoCode下载] M051的常用SYS操作

[复制链接]
559|4
 楼主| 小灵通2018 发表于 2019-12-28 23:52 | 显示全部楼层 |阅读模式
PLL, TE, ck, se, TI
  1. /****************************************************************************
  2. * [url=home.php?mod=space&uid=288409]@file[/url]     main.c
  3. * [url=home.php?mod=space&uid=895143]@version[/url]  V3.00
  4. * $Revision: 9 $
  5. * $Date: 15/07/02 11:18a $
  6. * @brief
  7. *           Demonstrate how to change system clock to different PLL frequency and output system clock from CLKO pin.
  8. *
  9. * @note
  10. * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
  11. *
  12. ******************************************************************************/
  13. #include <stdio.h>
  14. #include "NUC123.h"


  15. #define HCLK_CLOCK       72000000

  16. #define SIGNATURE       0x125ab234
  17. #define FLAG_ADDR       0x20000FFC


  18. /*---------------------------------------------------------------------------------------------------------*/
  19. /* Define functions prototype                                                                              */
  20. /*---------------------------------------------------------------------------------------------------------*/
  21. int32_t main(void);


  22. /*---------------------------------------------------------------------------------------------------------*/
  23. /*  Brown Out Detector IRQ Handler                                                                         */
  24. /*---------------------------------------------------------------------------------------------------------*/
  25. void BOD_IRQHandler(void)
  26. {
  27.     /* Clear BOD Interrupt Flag */
  28.     SYS_CLEAR_BOD_INT_FLAG();

  29.     printf("Brown Out is Detected\n");
  30. }

  31. /*---------------------------------------------------------------------------------------------------------*/
  32. /*  Simple calculation test function                                                                       */
  33. /*---------------------------------------------------------------------------------------------------------*/
  34. #define PI_NUM  256
  35. int32_t f[PI_NUM + 1];
  36. uint32_t piTbl[19] =
  37. {
  38.     3141,
  39.     5926,
  40.     5358,
  41.     9793,
  42.     2384,
  43.     6264,
  44.     3383,
  45.     2795,
  46.     288,
  47.     4197,
  48.     1693,
  49.     9937,
  50.     5105,
  51.     8209,
  52.     7494,
  53.     4592,
  54.     3078,
  55.     1640,
  56.     6284
  57. };

  58. int32_t piResult[19];

  59. int32_t pi(void)
  60. {
  61.     int32_t i, i32Err;
  62.     int32_t a = 10000, b = 0, c = PI_NUM, d = 0, e = 0, g = 0;

  63.     for(; b - c;)
  64.         f[b++] = a / 5;

  65.     i = 0;
  66.     for(; d = 0, g = c * 2; c -= 14,/*printf("%.4d\n",e+d/a),*/ piResult[i++] = e + d / a, e = d % a)
  67.     {
  68.         if(i == 19)
  69.             break;

  70.         for(b = c; d += f[b] * a, f[b] = d % --g, d /= g--, --b; d *= b);
  71.     }
  72.     i32Err = 0;
  73.     for(i = 0; i < 19; i++)
  74.     {
  75.         if(piTbl[i] != piResult[i])
  76.             i32Err = -1;
  77.     }

  78.     return i32Err;
  79. }

  80. void Delay(uint32_t x)
  81. {
  82.     int32_t i;

  83.     for(i = 0; i < x; i++)
  84.     {
  85.         __NOP();
  86.         __NOP();
  87.     }
  88. }

  89. uint32_t g_au32PllSetting[] =
  90. {
  91.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(25) | CLK_PLLCON_NO_4,  /* PLL = 25MHz */
  92.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(29) | CLK_PLLCON_NO_4,  /* PLL = 29MHz */
  93.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(33) | CLK_PLLCON_NO_4,  /* PLL = 33MHz */
  94.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(37) | CLK_PLLCON_NO_4,  /* PLL = 37MHz */
  95.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(41) | CLK_PLLCON_NO_4,  /* PLL = 41MHz */
  96.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(45) | CLK_PLLCON_NO_4,  /* PLL = 45MHz */
  97.     CLK_PLLCON_PLL_SRC_HXT | CLK_PLLCON_NR(3) | CLK_PLLCON_NF(49) | CLK_PLLCON_NO_4   /* PLL = 49MHz */
  98. };

  99. void SYS_PLL_Test(void)
  100. {
  101.     int32_t  i;

  102.     /*---------------------------------------------------------------------------------------------------------*/
  103.     /* PLL clock configuration test                                                                             */
  104.     /*---------------------------------------------------------------------------------------------------------*/

  105.     printf("\n-------------------------[ Test PLL ]-----------------------------\n");

  106.     for(i = 0; i < sizeof(g_au32PllSetting) / sizeof(g_au32PllSetting[0]) ; i++)
  107.     {
  108.         /* Switch HCLK clock source to HXT and HCLK source divide 1 */
  109.         CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV_HCLK(1));

  110.         /* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware. */
  111.         CLK_DisablePLL();

  112.         /* Set PLL frequency */
  113.         CLK->PLLCON = g_au32PllSetting[i];

  114.         /* Waiting for PLL clock ready */
  115.         CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk);

  116.         /* Switch HCLK clock source to PLL */
  117.         CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_CLKDIV_HCLK(1));

  118.         printf("  Change system clock to %d Hz ...................... ", SystemCoreClock);

  119.         /* Output selected clock to CKO, CKO Clock = HCLK / 2^(1 + 1) */
  120.         CLK_EnableCKO(CLK_CLKSEL2_FRQDIV_S_HCLK, 1, 0);

  121.         /* The delay loop is used to check if the CPU speed is increasing */
  122.         Delay(0x400000);

  123.         if(pi())
  124.         {
  125.             printf("[FAIL]\n");
  126.         }
  127.         else
  128.         {
  129.             printf("[OK]\n");
  130.         }

  131.         /* Disable CKO clock */
  132.         CLK_DisableCKO();
  133.     }
  134. }

  135. void SYS_Init(void)
  136. {
  137.     /*---------------------------------------------------------------------------------------------------------*/
  138.     /* Init System Clock                                                                                       */
  139.     /*---------------------------------------------------------------------------------------------------------*/

  140.     /* Enable XT1_OUT(PF0) and XT1_IN(PF1) */
  141.     SYS->GPF_MFP |= SYS_GPF_MFP_PF0_XT1_OUT | SYS_GPF_MFP_PF1_XT1_IN;

  142.     /* Enable Internal RC 22.1184MHz clock */
  143.     CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);

  144.     /* Waiting for Internal RC clock ready */
  145.     CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);

  146.     /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
  147.     CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));

  148.     /* Enable external XTAL 12MHz clock */
  149.     CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);

  150.     /* Waiting for external XTAL clock ready */
  151.     CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);

  152.     /* Set core clock as HCLK_CLOCK */
  153.     CLK_SetCoreClock(HCLK_CLOCK);

  154.     /* Enable UART module clock */
  155.     CLK_EnableModuleClock(UART0_MODULE);

  156.     /* Select UART module clock source */
  157.     CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));

  158.     /*---------------------------------------------------------------------------------------------------------*/
  159.     /* Init I/O Multi-function                                                                                 */
  160.     /*---------------------------------------------------------------------------------------------------------*/

  161.     /* Set GPB multi-function pins for UART0 RXD(PB.0) and TXD(PB.1) */
  162.     SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB0_Msk | SYS_GPB_MFP_PB1_Msk);
  163.     SYS->GPB_MFP |= (SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD);

  164.     /* Set GPC multi-function pin for Clock Output(PC.13) */
  165.     SYS->GPC_MFP &= ~SYS_GPC_MFP_PC13_Msk;
  166.     SYS->ALT_MFP &= ~SYS_ALT_MFP_PC13_Msk;
  167.     SYS->GPC_MFP |= SYS_GPC_MFP_PC13_CLKO;
  168.     SYS->ALT_MFP |= SYS_ALT_MFP_PC13_CLKO;

  169. }

  170. void UART0_Init()
  171. {
  172.     /*---------------------------------------------------------------------------------------------------------*/
  173.     /* Init UART                                                                                               */
  174.     /*---------------------------------------------------------------------------------------------------------*/
  175.     /* Reset UART0 module */
  176.     SYS_ResetModule(UART0_RST);

  177.     /* Configure UART0 and set UART0 Baudrate */
  178.     UART_Open(UART0, 115200);
  179. }

  180. /*---------------------------------------------------------------------------------------------------------*/
  181. /* MAIN function                                                                                           */
  182. /*---------------------------------------------------------------------------------------------------------*/
  183. int32_t main(void)
  184. {
  185.     uint32_t u32data;

  186.     /* In end of main function, program issued CPU reset and write-protection will be disabled. */
  187.     if(SYS_IsRegLocked() == 0)
  188.         SYS_LockReg();

  189.     /* Unlock protected registers */
  190.     SYS_UnlockReg();

  191.     /* Init System, peripheral clock and multi-function I/O */
  192.     SYS_Init();

  193.     /* Lock protected registers */
  194.     SYS_LockReg();

  195.     /* Init UART0 for printf */
  196.     UART0_Init();

  197.     printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %dHz\n", SystemCoreClock);

  198.     /*
  199.         This sample code will show some function about system manager controller and clock controller:
  200.         1. Read PDID
  201.         2. Get and clear reset source
  202.         3. Setting about BOD
  203.         4. Change system clock depended on different PLL settings
  204.         5. Output system clock from CKO pin, and the output frequency = system clock / 4
  205.     */

  206.     printf("+----------------------------------------+\n");
  207.     printf("|    NUC123 System Driver Sample Code    |\n");
  208.     printf("+----------------------------------------+\n");

  209.     if(M32(FLAG_ADDR) == SIGNATURE)
  210.     {
  211.         printf("  CPU Reset success!\n");
  212.         M32(FLAG_ADDR) = 0;
  213.         printf("  Press any key to continue ...\n");
  214.         getchar();
  215.     }

  216.     /*---------------------------------------------------------------------------------------------------------*/
  217.     /* Misc system function test                                                                               */
  218.     /*---------------------------------------------------------------------------------------------------------*/

  219.     /* Read Part Device ID */
  220.     printf("Product ID 0x%x\n", SYS_ReadPDID());

  221.     /* Get reset source from last operation */
  222.     u32data = SYS_GetResetSrc();
  223.     printf("Reset Source 0x%x\n", u32data);

  224.     /* Clear reset source */
  225.     SYS_ClearResetSrc(u32data);

  226.     /* Unlock protected registers for Brown-Out Detector settings */
  227.     SYS_UnlockReg();

  228.     /* Check if the write-protected registers are unlocked before BOD setting and CPU Reset */
  229.     if(SYS_IsRegLocked() == 0)
  230.     {
  231.         printf("Protected Address is Unlocked\n");
  232.     }

  233.     /* Enable Brown-Out Detector, and set Brown-Out Detector voltage 2.7V */
  234.     SYS_EnableBOD(SYS_BODCR_BOD_INTERRUPT_EN, SYS_BODCR_BOD_VL_2_7V);

  235.     /* Enable BOD IRQ */
  236.     NVIC_EnableIRQ(BOD_IRQn);

  237.     /* Enable Low Voltage Reset function */
  238.     SYS_ENABLE_LVR();

  239.     /* Run PLL Test */
  240.     SYS_PLL_Test();

  241.     /* Write a signature work to SRAM to check if it is reset by software */
  242.     M32(FLAG_ADDR) = SIGNATURE;
  243.     printf("\n\n  >>> Reset CPU <<<\n");

  244.     /* Waiting for message send out */
  245.     UART_WAIT_TX_EMPTY(UART0);

  246.     /* Switch HCLK clock source to Internal RC 22.1184MHz clock and HCLK source divide 1 */
  247.     CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));

  248.     /* Set PLL to Power down mode and HW will also clear PLL_STB bit in CLKSTATUS register */
  249.     CLK_DisablePLL();

  250.     /* Reset CPU */
  251.     SYS_ResetCPU();
  252. }


 楼主| 小灵通2018 发表于 2019-12-28 23:53 | 显示全部楼层
  1. void Delay(uint32_t x)
  2. {
  3.     int32_t i;

  4.     for(i = 0; i < x; i++)
  5.     {
  6.         __NOP();
  7.         __NOP();
  8.     }
  9. }

还有一个延时的函数。
 楼主| 小灵通2018 发表于 2019-12-28 23:56 | 显示全部楼层
 楼主| 小灵通2018 发表于 2019-12-28 23:56 | 显示全部楼层
只有7个复位源,根据这个可以判断哪种,应该每次只有一个BIT是置位的吧,
yiy 发表于 2019-12-29 17:22 | 显示全部楼层
pi是测试啥
您需要登录后才可以回帖 登录 | 注册

本版积分规则

158

主题

1732

帖子

4

粉丝
快速回复 在线客服 返回列表 返回顶部