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39R08A5 头文件
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//Header file for SM39R08A5/OB39R08A5 microcontroller.
//FOSVOS MCU
#ifndef __39R08A5_H__
#define __39R08A5_H__
#define __39R08A5_H__
/* BYTE Registers */
sfr P3 = 0xB0;
sfr PSW = 0xD0;
sfr ACC = 0xE0;
sfr B = 0xF0;
sfr SP = 0x81;
sfr DPL = 0x82;
sfr DPH = 0x83;
sfr P3 = 0xB0;
sfr PSW = 0xD0;
sfr ACC = 0xE0;
sfr B = 0xF0;
sfr SP = 0x81;
sfr DPL = 0x82;
sfr DPH = 0x83;
sfr PCON = 0x87; /* SMOD,X,X,X,X,X,STOP,IDLE */
sfr TCON = 0x88;
sfr TMOD = 0x89;
sfr TL0 = 0x8A;
sfr TL1 = 0x8B;
sfr TH0 = 0x8C;
sfr TH1 = 0x8D;
sfr CKCON = 0x8E;
sfr SCON = 0x98;
sfr SBUF = 0x99;
sfr IE = 0xA8;
sfr IP = 0xA9;
sfr TCON = 0x88;
sfr TMOD = 0x89;
sfr TL0 = 0x8A;
sfr TL1 = 0x8B;
sfr TH0 = 0x8C;
sfr TH1 = 0x8D;
sfr CKCON = 0x8E;
sfr SCON = 0x98;
sfr SBUF = 0x99;
sfr IE = 0xA8;
sfr IP = 0xA9;
/* Dual DPTR control register */
sfr DPL1 = 0x84;
sfr DPH1 = 0x85;
sfr AUX = 0x91; /*BRS,x,x,PTS [1:0],PINTS[1:0],DPS */
sfr DPL1 = 0x84;
sfr DPH1 = 0x85;
sfr AUX = 0x91; /*BRS,x,x,PTS [1:0],PINTS[1:0],DPS */
/*ISP SFR */
sfr IFCON = 0x8F; /*X,CDPR,X,X,X,X,X,ISPE*/
sfr TAKEY = 0xF7;
sfr ISPFAH = 0xE1;
sfr ISPFAL = 0xE2;
sfr ISPFD = 0xE3;
sfr ISPFC = 0xE4;
sfr IFCON = 0x8F; /*X,CDPR,X,X,X,X,X,ISPE*/
sfr TAKEY = 0xF7;
sfr ISPFAH = 0xE1;
sfr ISPFAL = 0xE2;
sfr ISPFD = 0xE3;
sfr ISPFC = 0xE4;
/* Enhance UART control register */
sfr S0CON = 0x98;
sfr S0BUF = 0x99;
sfr S0RELL = 0xAA;
sfr S0RELH = 0xBA;
sfr SRELL = 0xAA;
sfr SRELH = 0xBA;
sfr S0CON = 0x98;
sfr S0BUF = 0x99;
sfr S0RELL = 0xAA;
sfr S0RELH = 0xBA;
sfr SRELL = 0xAA;
sfr SRELH = 0xBA;
/* Enhance Interrupt control register */
sfr IEN2 = 0x9A;
sfr IEN0 = 0xA8;
sfr IEN1 = 0xB8;
sfr IP0 = 0xA9;
sfr IP1 = 0xB9;
sfr IRCON = 0xC0;
sfr IEN2 = 0x9A;
sfr IEN0 = 0xA8;
sfr IEN1 = 0xB8;
sfr IP0 = 0xA9;
sfr IP1 = 0xB9;
sfr IRCON = 0xC0;
/* IRCON2 */
sfr IRCON2 = 0x97;
sfr IRCON2 = 0x97;
/* Reset rule */
sfr RSTS = 0xA1;
sfr LVC = 0xE6; /* LVI_EN,X,LVRXE,X,X,X,X,X */
sfr SWRES = 0xE7;
sfr RSTS = 0xA1;
sfr LVC = 0xE6; /* LVI_EN,X,LVRXE,X,X,X,X,X */
sfr SWRES = 0xE7;
/* ADC */
sfr ADCC1 = 0xAB;
sfr ADCC2 = 0xAC;
sfr ADCDH = 0xAD;
sfr ADCDL = 0xAE;
sfr ADCCS = 0xAF;
sfr ADCC1 = 0xAB;
sfr ADCC2 = 0xAC;
sfr ADCDH = 0xAD;
sfr ADCDL = 0xAE;
sfr ADCCS = 0xAF;
/* PWM */
sfr PWMC = 0xB5;
sfr PWMD0H = 0xBC;
sfr PWMD0L = 0xBD;
sfr PWMD1H = 0xBE;
sfr PWMD1L = 0xBF;
sfr PWMD2H = 0xB1;
sfr PWMD2L = 0xB2;
sfr PWMD3H = 0xB3;
sfr PWMD3L = 0xB4;
sfr PWMMDH = 0xCE;
sfr PWMMDL = 0xCF;
sfr PWMC = 0xB5;
sfr PWMD0H = 0xBC;
sfr PWMD0L = 0xBD;
sfr PWMD1H = 0xBE;
sfr PWMD1L = 0xBF;
sfr PWMD2H = 0xB1;
sfr PWMD2L = 0xB2;
sfr PWMD3H = 0xB3;
sfr PWMD3L = 0xB4;
sfr PWMMDH = 0xCE;
sfr PWMMDL = 0xCF;
/* WDT */
sfr WDTC = 0xB6;
sfr WDTK = 0xB7;
sfr WDTC = 0xB6;
sfr WDTK = 0xB7;
/* GPIO mode control register */
sfr P3M0 = 0xDA;
sfr P3M1 = 0xDB;
sfr P3M0 = 0xDA;
sfr P3M1 = 0xDB;
/* IIC */
sfr IICS = 0xF8;
sfr IICCTL = 0xF9;
sfr IICA1 = 0xFA;
sfr IICA2 = 0xFB;
sfr IICRWD = 0xFC;
sfr IICEBT = 0xFD;
sfr IICS = 0xF8;
sfr IICCTL = 0xF9;
sfr IICA1 = 0xFA;
sfr IICA2 = 0xFB;
sfr IICRWD = 0xFC;
sfr IICEBT = 0xFD;
/*Comparator */
sfr OPPIN = 0xF6;
sfr CMP0CON = 0xFE;
sfr OpPin = 0xF6;
sfr Cmp0CON = 0xFE;
sfr OPPIN = 0xF6;
sfr CMP0CON = 0xFE;
sfr OpPin = 0xF6;
sfr Cmp0CON = 0xFE;
/* BIT Registers */
sbit P3_0 = 0xB0;
sbit P3_1 = 0xB1;
sbit P3_2 = 0xB2;
sbit P3_3 = 0xB3;
sbit P3_4 = 0xB4;
sbit P3_5 = 0xB5;
sbit P3_6 = 0xB6;
sbit P3_7 = 0xB7;
sbit P3_0 = 0xB0;
sbit P3_1 = 0xB1;
sbit P3_2 = 0xB2;
sbit P3_3 = 0xB3;
sbit P3_4 = 0xB4;
sbit P3_5 = 0xB5;
sbit P3_6 = 0xB6;
sbit P3_7 = 0xB7;
/* PSW */
sbit CY = PSW^7;
sbit AC = PSW^6;
sbit F0 = PSW^5;
sbit RS1 = PSW^4;
sbit RS0 = PSW^3;
sbit OV = PSW^2;
sbit P = PSW^0; //8052 only
sbit CY = PSW^7;
sbit AC = PSW^6;
sbit F0 = PSW^5;
sbit RS1 = PSW^4;
sbit RS0 = PSW^3;
sbit OV = PSW^2;
sbit P = PSW^0; //8052 only
/* TCON */
sbit TF1 = TCON^7;
sbit TR1 = TCON^6;
sbit TF0 = TCON^5;
sbit TR0 = TCON^4;
sbit IE1 = TCON^3;
sbit IT1 = TCON^2;
sbit IE0 = TCON^1;
sbit IT0 = TCON^0;
sbit TF1 = TCON^7;
sbit TR1 = TCON^6;
sbit TF0 = TCON^5;
sbit TR0 = TCON^4;
sbit IE1 = TCON^3;
sbit IT1 = TCON^2;
sbit IE0 = TCON^1;
sbit IT0 = TCON^0;
/* IE */
sbit EA = IE^7;
sbit ET2 = IE^5;
sbit ES = IE^4;
sbit ET1 = IE^3;
sbit EX1 = IE^2;
sbit ET0 = IE^1;
sbit EX0 = IE^0;
sbit EA = IE^7;
sbit ET2 = IE^5;
sbit ES = IE^4;
sbit ET1 = IE^3;
sbit EX1 = IE^2;
sbit ET0 = IE^1;
sbit EX0 = IE^0;
/* P3 */
sbit T1 = P3^5;
sbit T0 = P3^4;
sbit INT1 = P3^3;
sbit INT0 = P3^2;
sbit TXD = P3^1;
sbit RXD = P3^0;
sbit T1 = P3^5;
sbit T0 = P3^4;
sbit INT1 = P3^3;
sbit INT0 = P3^2;
sbit TXD = P3^1;
sbit RXD = P3^0;
/* S0CON */
sbit SM0 = S0CON^7;
sbit SM1 = S0CON^6;
sbit SM2 = S0CON^5;
sbit REN = S0CON^4;
sbit TB8 = S0CON^3;
sbit RB8 = S0CON^2;
sbit TI = S0CON^1;
sbit RI = S0CON^0;
sbit SM0 = S0CON^7;
sbit SM1 = S0CON^6;
sbit SM2 = S0CON^5;
sbit REN = S0CON^4;
sbit TB8 = S0CON^3;
sbit RB8 = S0CON^2;
sbit TI = S0CON^1;
sbit RI = S0CON^0;
/* IICS */
sbit MPIF = IICS^6;
sbit LAIF = IICS^5;
sbit RXIF = IICS^4;
sbit TXIF = IICS^3;
sbit RXAK = IICS^2;
sbit TXAK = IICS^1;
sbit RW = IICS^0;
sbit BB = IICS^0;
sbit MPIF = IICS^6;
sbit LAIF = IICS^5;
sbit RXIF = IICS^4;
sbit TXIF = IICS^3;
sbit RXAK = IICS^2;
sbit TXAK = IICS^1;
sbit RW = IICS^0;
sbit BB = IICS^0;
/* IRCON */
sbit IICIF = IRCON^5;
sbit LVIIF = IRCON^4;
sbit ADCIF = IRCON^2;
sbit PWMIF = IRCON^0;
sbit IICIF = IRCON^5;
sbit LVIIF = IRCON^4;
sbit ADCIF = IRCON^2;
sbit PWMIF = IRCON^0;
/* IEN1 */
sbit IEIIC = IEN1^5;
sbit IELVI = IEN1^4;
sbit IEADC = IEN1^2;
sbit IEPWM = IEN1^0;
sbit IEIIC = IEN1^5;
sbit IELVI = IEN1^4;
sbit IEADC = IEN1^2;
sbit IEPWM = IEN1^0;
/* Interrupt Define */
#define d_INT0_Vector 0 // 0003h
#define d_T0_Vector 1 // 000Bh
#define d_INT1_Vector 2 // 0013h
#define d_T1_Vector 3 // 001Bh
#define d_UART0_Vector 4 // 0023h
#define d_PWM_Vector 8 // 0043h
#define d_ADC_Vector 10 // 0053h
#define d_LVI_Vector 12 // 0063h
#define d_IIC_Vector 13 // 006Bh
#define d_Comparator_Vector 18 // 0093h
#define d_INT0_Vector 0 // 0003h
#define d_T0_Vector 1 // 000Bh
#define d_INT1_Vector 2 // 0013h
#define d_T1_Vector 3 // 001Bh
#define d_UART0_Vector 4 // 0023h
#define d_PWM_Vector 8 // 0043h
#define d_ADC_Vector 10 // 0053h
#define d_LVI_Vector 12 // 0063h
#define d_IIC_Vector 13 // 006Bh
#define d_Comparator_Vector 18 // 0093h
/*--------------------------------------------------------------------------
//=====================================================================
// SyncMos/On-Bright MCU FOSVOS 08A5
// 021-58998693
// www.fosvos.com
//====================================================================
/*--------------------------------------------------------------------------
Header file for SM39R08A5/OB39R08A5 microcontroller.
-------------------------------------------------------------------------*/
//=====================================================================
// SyncMos/On-Bright MCU FOSVOS 08A5
// 021-58998693
// www.fosvos.com
//====================================================================
/*--------------------------------------------------------------------------
Header file for SM39R08A5/OB39R08A5 microcontroller.
-------------------------------------------------------------------------*/
#endif
