dspic33fj128gp706 关于IO控制

只看该作者 · 2018-11-11 17:13

dspic33fj128gp706，RB0,RB1,RB2，RB3,端口会相互影响，对RB3单独控制无效，附上代码，请大神帮忙看下。

#include<p33Fxxxx.h>
//#include<p33fj128gp706a.h>
// DSPIC33FJ128GP706 Configuration Bit Settings
// 'C' source line config statements
// FBS
#pragma config BWRP = WRPROTECT_OFF    // Boot Segment Write Protect (Boot Segment may be written)
#pragma config BSS = NO_FLASH          // Boot Segment Program Flash Code Protection (No Boot program Flash segment)
#pragma config RBS = NO_RAM          // Boot Segment RAM Protection (No Boot RAM)

// FSS
#pragma config SWRP = WRPROTECT_OFF    // Secure Segment Program Write Protect (Secure Segment may be written)
#pragma config SSS = NO_FLASH          // Secure Segment Program Flash Code Protection (No Secure Segment)
#pragma config RSS = NO_RAM          // Secure Segment Data RAM Protection (No Secure RAM)

// FGS
#pragma config GWRP = OFF             // General Code Segment Write Protect (User program memory is not write-protected)
#pragma config GSS = OFF             // General Segment Code Protection (User program memory is not code-protected)

// FOSCSEL
#pragma config FNOSC = FRCPLL          // Oscillator Mode (Internal Fast RC (FRC) w/ PLL)
#pragma config IESO = ON             // Two-speed Oscillator Start-Up Enable (Start up with FRC, then switch)

// FOSC
#pragma config POSCMD = NONE          // Primary Oscillator Source (Primary Oscillator Disabled)
#pragma config OSCIOFNC = ON          // OSC2 Pin Function (OSC2 pin has digital I/O function)
#pragma config FCKSM = CSDCMD          // Clock Switching and Monitor (Both Clock Switching and Fail-Safe Clock Monitor are disabled)

// FWDT
#pragma config WDTPOST = PS32768       // Watchdog Timer Postscaler (1:32,768)
#pragma config WDTPRE = PR128          // WDT Prescaler (1:128)
#pragma config WINDIS = OFF          // Watchdog Timer Window (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF          // Watchdog Timer Enable (Watchdog timer enabled/disabled by user software)

// FPOR
#pragma config FPWRT = PWR128          // POR Timer Value (128ms)

// FICD
#pragma config ICS = PGD1             // Comm Channel Select (Communicate on PGC1/EMUC1 and PGD1/EMUD1)
#pragma config JTAGEN = OFF          // JTAG Port Enable (JTAG is Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>

void Delay1ms() //@10MHz
{
unsigned char i, j;

i = 10;
j = 183;
do
{
while (--j);
} while (--i);
}

void Delay_ms(unsigned int nms)
{
while(nms--)
{
   Delay1ms();
}

}

void SYS_Init()
{
TRISB = 0X0000;
LATB = 0Xffff;
PORTB = 0Xffff;

TRISC = 0X0000;
LATC = 0Xffff;
PORTC = 0Xffff;
}

void ADC_Init()
{
AD1PCFGH = 0XFFFF;
AD1PCFGL = 0XFFFF;
AD2PCFGL = 0XFFFF;
}

void Time1_Init()
{
TMR1 = 15536;
T1CON = 0X0000;
T1CONbits.TCKPS = 2;
_T1IE = 1;
_TON = 0;
}

void OSC_Init() //晶振配置 FCY = 7370000M*41/2/2/2 = 37 771250
{
// Configure PLL prescaler, PLL postscaler, PLL divisor
PLLFBD = 41; // M = 43
_PLLPOST=0; // N2 = 2
_PLLPRE=0;    // N1 = 2

// Initiate Clock Switch to Internal FRC with PLL (NOSC = 0b001)
__builtin_write_OSCCONH(0x01);
__builtin_write_OSCCONL(0x01);

// Wait for Clock switch to occur
while (_COSC!= 0b001);

// Wait for PLL to lock
while(_LOCK != 1) {};

}
void __attribute__((__interrupt__,no_auto_psv)) _T1Interrupt(void)
{
_T1IF = 0;
TMR1 = 15536;
_LATB0 = !_LATB0;
}

int main()
{
OSC_Init();
ADC_Init();
SYS_Init();
Time1_Init();
_TON = 1;
while(1)
{
      _LATB3 = !_LATB3;
      Delay_ms(500);
      Delay_ms(500);
}
}

只看该作者 · 2018-11-19 14:42

低级问题硬件存在短路