[PIC单片机] 求助:PIC18F2553 上电延时定时器 (PWRT)关闭不了。

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 楼主 | 2018-12-4 22:33 | 显示全部楼层 |阅读模式
急急急!
 楼主 | 2018-12-5 09:15 | 显示全部楼层
// PIC18F2553 芯片配置位
// CONFIG1L
#pragma config PLLDIV = 1           //PLL 预分频比选择位
#pragma config CPUDIV = OSC1_PLL2   //系统时钟后分频选择位
#pragma config USBDIV = 1           //USB 时钟选择位
// CONFIG1H
//#pragma config FOSC = INTOSC_XT     // Oscillator Selection bits (Internal oscillator, XT used by USB (INTXT))
#pragma config FOSC = INTOSC_HS     // Oscillator Selection bits (Internal oscillator, XT used by USB (INTXT))
#pragma config FCMEN = OFF          //故障保护时钟监视器使能位
#pragma config IESO = OFF           //内部/外部振荡器切换位
// CONFIG2L
#pragma config PWRT = OFF           // Power-up Timer Enable bit (PWRT disabled) 75.488MS  BOR =OFF
//#pragma config PWRT = ON          // Power-up Timer Enable bit (PWRT disabled) 75.526MS     BOR =OFF
#pragma config BOR = OFF            // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 3             //0=> 4.36V-4.825V; 1=> 4.11V-4.55V;2=> 2.65V-2.93V;3=> 2.00V-2.16V  Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF         // USB Voltage Regulator Enable bit (USB voltage regulator disabled)
// CONFIG2H
#pragma config WDT = OFF            // Watchdog Timer Enable bit (WDT enabled)
#pragma config WDTPS = 16384        // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF     // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for low-power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = OFF      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
//#pragma config ICPRT = ON
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
#pragma config DEBUG = ON
// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)
// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)
// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)
 楼主 | 2018-12-5 11:24 | 显示全部楼层

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| 2018-12-6 10:40 | 显示全部楼层
你是怎么确定PWRT没有关闭的?
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