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Depending on the input source
impedance and the common mode input voltage, the difference amplifier
can be designed in a single-supply system with ease. The difference
amplifier's performance is limited by its finite input resistance.
Therefore, when high input-source
impedance is present, a difference amplifier will load down the input
signal. A difference amplifier will be insensitive to common-mode
voltages only if the op-amp is ideal and the resistors are perfectly
matched. However, no amplifier is ideal, and common-mode rejection
ratio (CMRR) is a strong function of the resistor mismatches. Assuming
an ideal op-amp and tight resistor tolerance of 0.01%, the in-amp's
CMRR degrades to 72 dB. Nonetheless, it is the only in-amp realization
that can sense voltages that are above the supply rails.
As with all in-amps, a REF terminal
sets the zero level of the output. Depending on the expected
differential input voltage, the REF terminal has to be driven by a low
impedance source to maximize the dynamic range of the output. If the
expected differential input voltage is only positive (IN+ greater than
IN-), then the REF terminal is grounded. For differential input voltage
that swings symmetrically across zero, the REF terminal should sit at VCC/2.
When the REF terminal needs to be
lifted above ground, the most common mistake is driving the REF
terminal with a resistor divider. A low-impedance source, such as a
buffer or a voltage reference, is needed to drive the REF terminal.
Otherwise, the CMRR of the difference amplifier circuit will degrade.
The finite impedance drawback of the difference amplifier is eliminated by preceding it with a buffer, as in Figure 2:
This is a classic in-amp
realization known as the three op amp in-amp, and has been available in
a monolithic IC for years. Manufacturers specify carefully trimmed
internal resistors to 50 kΩ and resistor RG is brought out for gain control. The resulting gain equation is simplified to:
GAIN = (1+ 100 kΩ/RG).
This three op-amp realization solves a problem but creates another. The
buffer improves the input impedance but significantly reduces the input
range of the in-amp.
With three-op amp topology, the
user has to be even more careful. It is usually the gain stages OA1 and
OA2 where most users get in trouble. These gain stages will saturate
when high gains and improper common mode biasing are combined. A
balance of common-mode biasing versus gain should be considered.
For example, the three-op-amp in Figure 2 is implemented with a gain of 1000. The expected input is 2 mVpp. The three-op-amp, which is the AD623, has a level shifter integrated to shift the common-mode voltage up to Vbe (0.7 V). Also, the REF terminal is raised to 2.5 V to achieve maximum and symmetrical positive and negative swing.
The common mode voltage of 0.7 V will also exist at the negative terminals of the OA1 and OA2. The output of OA1 will be:
Vout1 = 0.7 V + 2 mV * (50 kΩ/100) = 1.7 V.
The output of OA2 will be:
Vout2 = 0.7 V " 2 mV * (50 kΩ/100) = -0.3 V.
Clearly, the OA2 cannot produce a negative voltage and is saturated.
The problem is exacerbated with decreasing supplies and increasing
gains.
To improve the headroom of
operation without increasing the supplies and without lowering the
gain, the common-mode has to be biased right at VCC/2.
Common-mode biasing involves additional external circuitry and is prone
to offset errors. Again, the REF terminal should be driven by a
low-impedance source to preserve the CMRR performance.
Figure 3 shows another
popular in-amp realization, the two op-amp topology. Simply put, it is
a cascade of two inverters with a high input impedance and high CMRR,
but with much more carefully trimmed resistors.
In this case, it will be more
difficult to saturate the output of the first OA1, because it is gained
by a factor slightly greater than 1:
Vout1 = Vin * (1 + 25 kΩ/100 kΩ) when REF=0 V.
As such, higher gains can be
achieved compared to the three op amp counterpart. INA122 is a two
op-amp topology and can obtain gains up to 10,000 V/V.
Similar to the three op-amp
configuration, the two op-amp design REF terminal has limitations. OUT1
never goes below zero. In order to avoid saturation of OA1 and thus
erroneous output voltages, the REF terminal should always be less than
(1 + R1/R2) times the common mode voltage, Vcm.
Thus, for ground-sensing applications, a REF terminal should never be
lifted above ground. This is a huge disadvantage when the zero level of
the output needs to be adjusted.
The best solution is to simplify
the design and eliminate additional circuitry associated with
conventional instrumentation amplifiers, Figure 4.
This can be achieved by using
in-amps that have two pairs of inputs, representing a significant
difference from the previous topologies. One of the pairs is driven
directly by a differential input signal. The other is driven by a
portion of the output. This active input stage is the feedback path,
hence the term feedback terminals. The common-mode input can be biased
anywhere between or slightly above the supplies, regardless of gains,
up to 10,000 V/V. There is no fear in saturating the buffers at high
gains, unlike a three op amp design. The in-amps also should have a
high-impedance REF terminal, which eliminates the need for an
additional buffer.
One example of a device that
optimizes performance for single-supply applications is the EL8170/3
from Intersil. A simplified schematic and block diagram for the
EL8170/3 is shown in Figure 5, to illustrate rail-to-rail
operation for both the input and output stages. The same schematic
applies to the EL8171/2, but with the PNP transistors (Q1-Q4) replaced with P-channel MOSFETs for lower input-bias current.
The input terminals (IN+ and IN-)
and feedback terminals (FB+ and FB-) of the EL8170/3 are single,
differential-pair bipolar PNP devices aided by an Input Range
Enhancement Circuit to increase the headroom of the common-mode input
voltage. Likewise, the input terminals (IN+ and IN-) and feedback
terminals (FB+ and FB-) of the EL817/2 are single, differential-pair
P-MOSFET devices aided by an Input Range Enhancement Circuit to
increase the headroom of the common-mode input voltage.
As a result, the input common-mode
voltage range of all these instrumentation amplifiers is rail-to-rail,
and can handle input voltages that are at, or slightly beyond, the
supply and ground, thus making these in-amps well suited for single 5V
or 3.3V low-voltage-supply systems. This eliminates the need to move
the common-mode input of the in-amps to achieve symmetrical input
voltage.
One of the benefits of a device like this is its ability to sense voltage dynamically at both rails, at high gains. Figure 6 is an elegant circuit simplifying current sensing for motors using H-bridge drive.
During Phase1, when Q1 and Q3 are on, the common-mode voltage is close to ground. During Phase, when Q2 and Q4
are on, the common-mode voltage is close to 5 V. The EL8172, one of the
members of the EL8170 family, ignores these common-mode voltage
variations but amplifies a differential voltage 1,000 times. A simple
and economical resistor divider sets the REF terminal to 25 mV, thus
setting the zero level to 2.5 V and improving the dynamic output range.
When the output voltage is less than 2.5 V, the motor is accelerating
in one direction. When the output voltage is more than 2.5 V, the motor
is accelerating in the other direction.
Intersil's new family of
instrumentation amplifiers are optimized for single-supply systems. The
EL8170 and EL8173 are single in-amps with the bipolar input stage,
featuring lower 1/f corner frequency than the EL8171 and EL8172.
However, the EL8171 and EL8172, with the MOSFET input stage, have
virtually no input bias current and are well-suited for extremely high
source-impedance applications. Dual and quad versions of these in-amps
are also available from Intersil.