日志
PS2 HOST IP core
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Name: ps2_host_controller
Created: Dec 16, 2011
Updated: Dec 19, 2011
SVN Updated: Dec 19, 2011
SVN: Browse
Latest version: download
Statistics: View
Category: Communication controller
Language: Verilog
Development status: Beta
Additional info: FPGA proven
WishBone Compliant: No
License: LGPL
This core aims at implementing host side of IBM PS/2 keyboard and mouse communication protocol.
To run testbench:
%> iverilog -DSYS_CLOCK_HZ=100000 -o ps2_host_testbench ps2_host_testbench.v
%> vvp ps2_host_testbench -lxt2
%> gtkwave ps2_host_testbench.lxt
上边仿真使用的是开源的iverilog和gtkwave，笔者已使用，稍后将资源使用情框报上。
使用时只需接顶层文件ps2_host.v
模块信号也都是很简单的，很适合初学者使用学习。
注意都是高电平有效。。
module ps2_host(
input wire sys_clk,
input wire sys_rst,
inout wire ps2_clk,
inout wire ps2_data,
input wire [7:0] tx_data,
input wire send_req,
output wire busy,
output wire [7:0] rx_data,
output wire ready,
output wire error
);
