dm9000a 寄存器io正常... (这次成功!)

造成不稳定的主要原因.

还有一个问题是linkst检测不到....下一步查这个..


除了这些问题外, 我还发现, 编程手册有2个版本....一个05年的, 一个07年的, 很多不同之处, 我用的05年版本......................TMD

１．只用过ｄｍ９１６１ａ，　反正就是死扣官方原理图，不一样的都改成一样的吧。当时也是这么调的。
　　既然是上拉，电阻太大可能会有影响的。
２．光看你的第二个帖关于ＥＥＣＳ的，
　　上拉和悬空是在ｓｔａｐ的时候，也就是一上电的时候起作用。
　　在芯片开始工作以后，是ｏｕｔｐｕｔ。
　　貌似不矛盾。

dm9000A的芯片不同批次表现也不稳定，所以一直用他不敢做产品。
咱是小客户搭不起那精力。

DM9000A是比较难用，对PCB的要求比较高，远不如CS8900A好使，同一批片子，同一批PCB，焊上后有的能支持100M，有的就只能支持到10M

最好还是在确认问题的情况下改PCB，否则PCB改完还有相同的问题又要重来一遍。

再看看
1. 电路原理图和官方版有没有差异, 确保一致。
2. 焊接的时候所有的器件都焊对了，包括焊接的位置
3. 驱动程序也使用可靠的已经证明过的版本

这一类芯片本身就是N个版本的，手册是X个版本的，而且一个包里有M个文件……如果你只用到了一些最基本的功能还好办一点，起码可以保证管脚大致兼容。

我还以为司南要跳楼了:lol

坑的就是你这种人品好的人:lol

大家好，我是DAVICOM的大陆总代理。
关于大家在上面提到的问题，我也深有体会。其实这个跟厂家没有多大关系。

先看看如何检查网线是否插好.


http://en.wikipedia.org/wiki/Physical_layer


he Physical Layer is the first and lowest layer in the seven-layer OSI model of computer networking. The implementation of this layer is often termed PHY.
物理层一般简称为phy. 是OSI模型的最底层.

The Physical Layer consists of the basic hardware transmission technologies of a network. It is a fundamental layer underlying the logical data structures of the higher level functions in a network. Due to the plethora of available hardware technologies with widely varying characteristics, this is perhaps the most complex layer in the OSI architecture.
PHY是硬件实现, 可能是最复杂的一层.

The Physical Layer defines the means of transmitting raw bits rather than logical data packets over a physical link connecting network nodes. The bit stream may be grouped into code words or symbols and converted to a physical signal that is transmitted over a hardware transmission medium. The Physical Layer provides an electrical, mechanical, and procedural interface to the transmission medium. The shapes and properties of the electrical connectors, the frequencies to broadcast on, the modulation scheme to use and similar low-level parameters, are specified here.
硬件细节全在phy啦.(包括link检查)


Within the semantics of the OSI network architecture, the Physical Layer translates logical communications requests from the Data Link Layer into hardware-specific operations to affect transmission or reception of electronic signals.


Physical signaling sublayer

In a local area network (LAN) or a metropolitan area network (MAN) using open systems interconnection (OSI) architecture, the physical signaling sublayer is the portion of the Physical Layer that:

• interfaces with the medium access control sublayer (MAC) which is a part of the Data Link Layer
• performs character encoding, transmission, reception and decoding.
• performs mandatory isolation functions.[1]

[edit] List of services




List of services

The major functions and services performed by the Physical Layer are:
PHY干了什么:

• Bit-by-bit or symbol-by-symbol delivery
• Providing a standardized interface to physical transmission media, including
  • Mechanical specification of electrical connectors and cables, for example maximum cable length
  • Electrical specification of transmission line signal level and impedance
  • Radio interface, including electromagnetic spectrum frequency allocation and specification of signal strength, analog bandwidth, etc.
  • Specifications for IR over optical fiber or a wireless IR communication link
• Modulation
• Line coding
• Bit synchronization in synchronous serial communication
• Start-stop signalling and flow control in asynchronous serial communication
• Circuit switching
• Multiplexing
  • Establishment and termination of circuit switched connections
• Carrier sense and collision detection utilized by some level 2 multiple access protocols
• Equalization filtering, training sequences, pulse shaping and other signal processing of physical signals
• Forward error correction[2] for example bitwise convolutional coding
• Bit-interleaving and other channel coding

The Physical Layer is also concerned with

• Bit rate
• Point-to-point, multipoint or point-to-multipoint line configuration
• Physical network topology, for example bus, ring, mesh or star network
• Serial or parallel communication
• Simplex, half duplex or full duplex transmission mode
• Autonegotiation

List of protocols

• Telephone network modems- V.92
• IRDA Physical Layer
• USB Physical Layer
• EIA RS-232, EIA-422, EIA-423, RS-449, RS-485
• Ethernet physical layer Including 10BASE-T, 10BASE2, 10BASE5, 100BASE-TX, 100BASE-FX, 100BASE-T, 1000BASE-T, 1000BASE-SX and other varieties
• Varieties of 802.11Wi-Fi Physical Layers
• DSL
• ISDN
• T1 and other T-carrier links, and E1 and other E-carrier links
• SONET/SDH
• Optical Transport Network (OTN)
• GSM Um radio interface physical layer
• Bluetooth Physical Layer
• ITU Recommendations: see ITU-T
• Firewire
• TransferJet Physical Layer
• Etherloop
• ARINC 818 Avionics Digital Video Bus
• G.hn/G.9960 Physical Layer

直接跳至

http://en.wikipedia.org/wiki/Ethernet_physical_layer

看以太网的.


The Ethernet physical layer is the physical layer component of the Ethernet standard.
The Ethernet physical layer evolved over a considerable time span and encompasses quite a few physical media interfaces and several magnitudes of speed. The speed ranges from 1 Mbit/s to 100 Gbit/s in speed while the physical medium can range from bulky coaxial cable to twisted pair to optical fiber. In general, network protocol stack software will work similarly on all of the following types.
10 gigabit Ethernet is becoming more popular in both enterprise and carrier networks, with 40 Gbit/s[1][2] and 100 Gbit/s Ethernet[3] now ratified[4]. Higher speeds are under development.[5] Metcalfe now believes commercial applications using terabit Ethernet may occur by 2015 though he says existing Ethernet standards may have to be overthrown to reach terabit Ethernet.[6]
The following sections provide a brief summary of all the official Ethernet media types (section numbers from the IEEE 802.3-2008 standard are parenthesized). In addition to these official standards, many vendors have implemented proprietary media types for various reasons—often to support longer distances over fiber optic cabling.
Many Ethernet adapters and switch ports support multiple speeds, using autonegotiation to set the speed and duplex for the best values supported by both connected devices. If auto-negotiation fails, a multiple speed device will sense the speed used by its partner, but will assume half-duplex. A 10/100 Ethernet port supports 10BASE-T and 100BASE-TX. A 10/100/1000 Ethernet port supports 10BASE-T, 100BASE-TX, and 1000BASE-T.

直接跳至

http://en.wikipedia.org/wiki/100BASE-TX

Fast Ethernet: 100Mbps Ethernet (IEEE 802.3u)

Fast Ethernet (100BASE-T) offers a speed increase ten times that of the 10BaseT Ethernet specification, while preserving such qualities as frame format, MAC mechanisms, and MTU. Such similarities allow the use of existing 10BaseT applications and network management tools on Fast Ethernet networks. Officially, the 100BASE-T standard is IEEE 802.3u.
802.3u, 1995年制定, 基本上实时标准.

Like Ethernet, 100BASE-T is based on the CSMA/CD LAN access method. There are several different cabling schemes that can be used with 100BASE-T, including:

    * 100BASE-TX: two pairs of high-quality twisted-pair wires (就是4线制, 用的最多的.)
    * 100BASE-T4: four pairs of normal-quality twisted-pair wires
    * 100BASE-FX: fiber optic cables

The Fast Ethernet specifications include mechanisms for Auto-Negotiation of the media speed. This makes it possible for vendors to provide dual-speed Ethernet interfaces that can be installed and run at either 10-Mbps or 100-Mbps automatically.

The IEEE identifiers include three pieces of information. The first item, "100", stands for the media speed of 100-Mbps. The "BASE" stands for "baseband," which is a type of signaling. Baseband signaling simply means that Ethernet signals are the only signals carried over the media system.

The third part of the identifier provides an indication of the segment type. The "T4" segment type is a twisted-pair segment that uses four pairs of telephone-grade twisted-pair wire. The "TX" segment type is a twisted-pair segment that uses two pairs of wires and is based on the data grade twisted-pair physical medium standard developed by ANSI. The "FX" segment type is a fiber optic link segment based on the fiber optic physical medium standard developed by ANSI and that uses two strands of fiber cable. The TX and FX medium standards are collectively known as 100BASE-X.

The 100BASE-TX and 100BASE-FX media standards used in Fast Ethernet are both adopted from physical media standards first developed by ANSI, the American National Standards Institute. The ANSI physical media standards were originally developed for the Fiber Distributed Data Interface (FDDI) LAN standard (ANSI standard X3T9.5), and are widely used in FDDI LANs.



http://standards.ieee.org/getieee802/download/802.3-2002.pdf


就着一个能下载的.....槽了...

802.3-2002.pdf

先看目录. 我找link state检查.

目录:

INtroduction
(跳过)
MAC service specification

MAC frame structure

MAC

layer Managment(???)

pysical signaling service specification



直接搜索 "LINK status"


得到几处出处.

1.4.158 link pulse: Communication mechanism used in 10BASE-T and 100BASE-T networks to indicate
link status and (in Auto-Negotiation-equipped devices) to communicate information about abilities and
negotiate communication methods. 10BASE-T uses Normal Link Pulses (NLPs), which indicate link status
only. 10BASE-T and 100BASE-T nodes equipped with Auto-Negotiation exchange information using a Fast
Link Pulse (FLP) mechanism that is compatible with NLP. (See IEEE 802.3 Clauses 14 and 28.)



1.4.185 Normal Link Pulse (NLP): An out-of-band communications mechanism used in 10BASE-T to
indicate link status. (See IEEE 802.3 Figure 14–12.)


At power-on, in place of entering the Link Test Pass state as shown in Figure 18–4,
32 a MAU may optionally
enter the Link Test Fail Low Light state.
If a visible indicator is provided on the MAU to indicate the link status, it is recommended that the color be
green and that the indicator be labeled appropriately. It is further recommended that the indicator be on when
the MAU is in the Link Test Pass state and off otherwise.



22.2.4.2.13 Link Status
When read as a logic one, bit 1.2 indicates that the PHY has determined that a valid link has been estab-
lished. When read as a logic zero, bit 1.2 indicates that the link is not valid. The criteria for determining link
validity is PHY specific. The Link Status bit shall be implemented with a latching function, such that the
occurrence of a link failure condition will cause the Link Status bit to become cleared and remain cleared
until it is read via the management interface. This status indication is intended to support the management
attribute defined in 30.5.1.1.4, aMediaAvailable.


If a visible indicator is provided on the PHY to indicate the link status, it is recommended that the color be
green and that the indicator be labeled appropriately. It is further recommended that the indicator be on when
the PHY is in the LINK_PASS state and off otherwise.

null

Fast Link Pulse (FLP) mechanism
http://en.wikipedia.org/wiki/Autonegotiation

flp同时决定link检查和差分线自适应


Autonegotiation is an Ethernet procedure by which two connected devices choose common transmission parameters, such as speed and duplex mode. In this process, the connected devices first share their capabilities as for these parameters and then choose the fastest transmission mode they both support.
In the OSI model, autonegotiation resides in the physical layer. It was originally defined in the IEEE standard 802.3u in 1995. It was placed in the fast Ethernet part of the standard but is also backwards compatible to 10BASE-T. However, its implementation was optional, and a part of the specification was open to interpretation. The debatable portions of the autonegotiation specifications were eliminated by the 1998 version of IEEE 802.3. In 1999, the negotiation protocol was significantly extended by IEEE 802.3ab, which specified the protocol for gigabit Ethernet, making autonegotiation mandatory for 1000BASE-T gigabit Ethernet over copper. Specifically Section 28D.5 Extensions required for Clause40 (1000BASE-T)[1]

(跳过)



OverviewAutonegotiation can be used by devices that are capable of different transmission rates (such as 10 Mbit/s and 100 Mbit/s), different duplex modes (half duplex and full duplex), and/or different standards at the same speed (though in practice only one standard at each speed is widely supported). Every device declares its technology abilities, that is, its possible modes of operation. The two devices then choose the best possible mode of operation that are shared by the two devices, where higher speed (100 Mbit/s) is preferred over lower speed (10 Mbit/s), and full duplex is preferred over half duplex at the same speed.

Parallel detection is used when a device that is capable of autonegotiation is connected to one that is not. This happens if the other device does not support autonegotiation or autonegotiation is administratively disabled. In this condition, the device that is capable of autonegotiation can determine and match speed with the other device. This procedure cannot determine the presence of full duplex, so half duplex is always assumed.
The standards for 1000BASE-T and 1000BASE-TX require autonegotiation to be always present and enabled. Other than speed and duplex mode, autonegotiation is used to communicate the port type (single port or multiport) and the master-slave parameters (whether it is manually configured or not, whether the device is master or slave if this is the case, and the master-slave seed bit otherwise).


Autonegotiation is based on pulses similar to those used by 10BASE-T devices to detect the presence of a connection to another device.
协商机制建立在类似于10M检测链接是否建立的脉冲信号机制上, 设备没事的时候就发送这些信号. 这是些单极的正的100ns宽度左右的信号, 16ms来一回. 这些信号叫做 LIT在10M中, 100M中叫NLP.
These pulses are sent by a device when it is not sending or receiving any data. They are unipolar positive-only electrical pulses of a duration of 100 ns nominally with a maximum pulse width of 200 ns[2], generated at intervals of 16 ms (with a tolerance of 8 ms). These pulses were called link integrity test (LIT) pulses in the 10BASE-T terminology, and are referred to as normal link pulses (NLP) in the autonegotiation specification.

那么看样子没有示波器无法检测这些信号啦.

怎么办呢. 看看dm9000a能让我们在底层干什么!

1.2 Link status 0,RO/LL Link Status
1 = Valid link is established (for either 10Mbps or 100Mbps
operation)
0 = Link is not established
The link status bit is implemented with a latching function, so
that the occurrence of a link failure condition causes the link
status bit to be cleared and remain cleared until it is read via
the management interface



16.12 BP_ADPOK  0, RW BYPASS ADPOK
Force signal detector (SD) active. This register is for debug
only, not release to customer
1=Forced SD is OK,
0=Normal operation



16.7 F_LINK_100 0, RW Force Good Link in 100Mbps
0 = Normal 100Mbps operation
1 = Force 100Mbps good link status
This bit is useful for diagnostic purposes


18.14 LP_EN 1, RW Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation


20.13  FORCE_TXSD  0,RW Force Signal Detect
1: force SD signal OK in 100M
0: normal SD signal.

您好，楼上的。请加一下我的QQ：1604206301
我帮您看看，到底是什么原因？
其实原厂的回复，我也看了，大概就是那么回事。
而且我本人也协助过很多工程师解决过问题，但有的时候，人不是万能的，难免有些地方查不出原因的。

呵呵,看来楼主是粗心了. 芯片不工作的时候,就是要先查电源\晶振\复位信号啊.

不过,板子有时工作有时又不灵,比较难想到是复位的问题. 这次长经验了,下次做板子就不会困惑这么久了.

呵呵,看来楼主是粗心了. 芯片不工作的时候,就是要先查电源\晶振\复位信号啊.

不过,板子有时工作有时又不灵,比较难想到是复位的问题. 这次长经验了,下次做板子就不会困惑这么久了. ...
yan2005 发表于 2010-9-7 09:19

也不是粗心. 怎么说呢.

DM9000的初始化类似8051, 我在上学的时候学过这个8051需要一个慢上升沿初始化.

但俺开始就用的avr的MCU, 那个抗躁啊, 俺从来都是直接复位接电平, 从未出事. (这回还真出事啦).

包括这次的LPC11xx系列, 复位直接电平, 没事!

我断定问题出在开始上电那一刹那, 逐步追查, 才查到是复位过于敏感, 看了看标准电路, 可能是类8051需要慢上升沿. 和总代理询问后确定问题.


总之一句话: 人家主流MCU都不需要复位慢上升沿初始化啦, DM9000a还需要, 这是出问题的原因. 要是DM9000a给AVR似的抗躁, 怎么可能出这事!