CLOCK HALT FLAG<br />Bit 7 of the seconds register is defined as the clock halt (CH) flag. When this bit is set to logic 1, the clock oscillator<br />is stopped and the DS1302 is placed into a low-power standby mode with a current drain of less than 100nA. When<br />this bit is written to logic 0, the clock will start. The initial power-on state is not defined.<br /><br />晕,必须对CH位写零才能起振!<br />我开始都是没加MCU直接用示波器看的,刚才发现只要我一设置时间就起振,于是开始直接怀疑极可能与设置还有关,查手册一看果然……上面摘录自DS1302的datasheet。
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