STM32的Reference Manual上不是说得很清楚么
The wait states represent the ratio of the SYSCLK (system clock) period to the Flash memory access time:
zero wait state, if 0 < SYSCLK ≤ 24 MHz
one wait state, if 24 MHz < SYSCLK ≤ 48 MHz
two wait states, if 48 MHz < SYSCLK ≤ 72 MHz
|
|
楼主
