这边沟通了我们系统开发部门的小伙伴,他们给出了回复
针对system_apm32f0xx.c的修改:
- void SystemCoreClockUpdate(void)
- {
- uint32_t sysClock, pllMull, pllSource, Prescaler, plldiv;
- uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
- /* Get SYSCLK source */
- sysClock = RCM->CFG1_B.SCLKSWSTS;
- switch (sysClock)
- {
- case 0:
- SystemCoreClock = HSI_VALUE;
- break;
- /* sys clock is HSE */
- case 1:
- SystemCoreClock = HSE_VALUE;
- break;
- /* sys clock is PLL */
- case 2:
- pllMull = RCM->CFG1_B.PLLMULCFG + 2;
- pllSource = RCM->CFG1_B.PLLSRCSEL;
- plldiv = RCM->CFG2_B.PLLDIVCFG + 1;
- /* PLL entry clock source is HSE */
- if (pllSource == 2)
- {
- SystemCoreClock = (HSE_VALUE / plldiv) * pllMull;
- /* HSE clock divided by 2 */
- if (pllSource == RCM->CFG1_B.PLLHSEPSC)
- {
- SystemCoreClock >>= 1;
- }
- }
- /* PLL entry clock source is HSI */
- else if(pllSource == 1)
- {
- SystemCoreClock = (HSI_VALUE / plldiv) * pllMull;
- }
- /* PLL entry clock source is HSI/2 */
- else if(pllSource == 0)
- {
- SystemCoreClock = ((HSI_VALUE >> 1) / plldiv) * pllMull;
- }
- /* PLL entry clock source is HSI48 */
- else
- {
- SystemCoreClock = (HSI48_VALUE / plldiv) * pllMull;
- }
- break;
- default:
- SystemCoreClock = HSI_VALUE;
- break;
- }
- Prescaler = AHBPrescTable[(RCM->CFG1_B.AHBPSC)];
- SystemCoreClock >>= Prescaler;
- }
针对apm32f0xx_rcm.c的修改:
- uint32_t RCM_ReadPCLKFreq(void)
- {
- uint32_t hclk, pclk, divider;
- uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
- hclk = RCM_ReadHCLKFreq();
- divider = APBPrescTable[RCM->CFG1_B.APB1PSC];
- pclk = hclk >> divider;
- return pclk;
- }
之后我们会尽快更新官方文件,十分感谢!
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