[AT32F421] TMR1用DMA搬运数据给CH1 CH2，失效

void wk_tmr1_init(void)

{

  /* add user code begin tmr1_init 0 */



  /* add user code end tmr1_init 0 */



  gpio_init_type gpio_init_struct;

  tmr_output_config_type tmr_output_struct;

  tmr_brkdt_config_type tmr_brkdt_struct;



  gpio_default_para_init(&gpio_init_struct);



  /* add user code begin tmr1_init 1 */



  /* add user code end tmr1_init 1 */



  /* configure the tmr1 CH2 pin */

  gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_2);

  gpio_init_struct.gpio_pins = GPIO_PINS_9;

  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;

  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;

  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;

  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;

  gpio_init(GPIOA, &gpio_init_struct);



  /* configure counter settings */

  tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);

  tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);

  tmr_repetition_counter_set(TMR1, 0);

  tmr_period_buffer_enable(TMR1, TRUE);

  tmr_base_init(TMR1, 143, 0);



  /* configure primary mode settings */

  tmr_sub_sync_mode_set(TMR1, FALSE);

  tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);



  /* configure overflow event */

  tmr_overflow_request_source_set(TMR1, TRUE);



  /* configure channel 2 output settings */

  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;

  tmr_output_struct.oc_output_state = TRUE;

  tmr_output_struct.occ_output_state = FALSE;

  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_LOW;

  tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;

  tmr_output_struct.oc_idle_state = TRUE;

  tmr_output_struct.occ_idle_state = FALSE;

  tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);

  tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 30);

  tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, TRUE);



  tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);



  /* configure break and dead-time settings */

  tmr_brkdt_struct.brk_enable = FALSE;

  tmr_brkdt_struct.auto_output_enable = FALSE;

  tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;

  tmr_brkdt_struct.fcsoen_state = FALSE;

  tmr_brkdt_struct.fcsodis_state = FALSE;

  tmr_brkdt_struct.wp_level = TMR_WP_OFF;

  tmr_brkdt_struct.deadtime = 0;

  tmr_brkdt_config(TMR1, &tmr_brkdt_struct);





  tmr_output_enable(TMR1, TRUE);



  tmr_counter_enable(TMR1, TRUE);



  /* add user code begin tmr1_init 2 */



  /* add user code end tmr1_init 2 */

}