我在编译的时候出现这样的错误，找了好久都没有找到原因 ，求指点
Error (12152): Can't elaborate user hierarchy "DIV:DIV1hz"
我代码是
module miaobiao
(
SYSCLK,
RST,
LED_DATA,
LED_SEL
);
input SYSCLK;
input RST;
output LED_DATA;
output LED_SEL;
reg [7:0] LED_DATA;
reg [3:0] LED_SEL;
wire SYSCLK;
wire RST;
wire OUT;
reg [3:0] SENCOND_L_CNT ;
wire [3:0] SENCOND_L_CNT_N ;
DIV DIV1hz
(
.SYSCLK (SYSCLK),
.RST (RST),
.OUT (OUT)
);
endmodule
DIV这个模块的代码是
module DIV
(
SYSCLK,
RST,
OUT
);
input SYSCLK;
input RST;
output OUT;
reg [24:0] COUNT12;
reg OUT;
always @(posedge SYSCLK or negedge RST)
begin
if(COUNT12 == 25'b1011111010111100001000000)
begin
OUT<= ~OUT;
COUNT12<= 25'b0000000000000000000000000;
end
else if (!RST)
begin
OUT<= 0;
end
else
begin
COUNT12 <= COUNT12+1;
end
end
endmodule
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