需要一份lpc952的头文件！

哪位大哥大姐要是有的话，给我一份吧，相当感谢！

&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;//*******************************************************************************************<br /><br />/*--------------------------------------------------------------------------<br />REG952.H<br />Header&nbsp;file&nbsp;for&nbsp;Philips&nbsp;89LPC952<br /><br />--------------------------------------------------------------------------*/<br /><br />#ifndef&nbsp;__REG952_H__<br />#define&nbsp;__REG952_H__<br /><br />/*&nbsp;Include&nbsp;memory&nbsp;mapped&nbsp;SFRs&nbsp;*/<br />/*&nbsp;Analog&nbsp;Digital&nbsp;Converter&nbsp;0*/<br />#define&nbsp;ADC0HBND&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFEF))<br />#define&nbsp;ADC0LBND&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFEE))<br />#define&nbsp;AD0DAT0R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFE))<br />#define&nbsp;AD0DAT0L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFF))<br />#define&nbsp;AD0DAT1R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFC))<br />#define&nbsp;AD0DAT1L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFD))<br />#define&nbsp;AD0DAT2R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFA))<br />#define&nbsp;AD0DAT2L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFB))<br />#define&nbsp;AD0DAT3R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF8))<br />#define&nbsp;AD0DAT3L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF9))<br />#define&nbsp;AD0DAT4R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF6))<br />#define&nbsp;AD0DAT4L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF7))<br />#define&nbsp;AD0DAT5R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF4))<br />#define&nbsp;AD0DAT5L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF5))<br />#define&nbsp;AD0DAT6R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF2))<br />#define&nbsp;AD0DAT6L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF3))<br />#define&nbsp;AD0DAT7R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF0))<br />#define&nbsp;AD0DAT7L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF1))<br />#define&nbsp;BNDSTA0&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFED))<br /><br />#define&nbsp;BRGCON_1&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB3))<br />#define&nbsp;BRG0_1&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB4))<br />#define&nbsp;BRG1_1&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB5))<br />#define&nbsp;P4M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB8))<br />#define&nbsp;P4M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB9))<br />#define&nbsp;P5M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFBA))<br />#define&nbsp;P5M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFBB))<br />#define&nbsp;S1ADDR&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB2))<br />#define&nbsp;S1ADEN&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB1))<br />#define&nbsp;S1BUF&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB0))<br /><br /><br />/*&nbsp;&nbsp;BYTE&nbsp;Registers&nbsp;&nbsp;*/<br />sfr&nbsp;ACC&nbsp;&nbsp;=&nbsp;0xE0;<br />sfr&nbsp;AD0CON&nbsp;=&nbsp;0x97;<br />sfr&nbsp;AD0INS&nbsp;=&nbsp;0xA3;<br />sfr&nbsp;ADMODA&nbsp;=&nbsp;0xC0;<br />sfr&nbsp;ADMODB&nbsp;=&nbsp;0xA1;<br />sfr&nbsp;AUXR1&nbsp;&nbsp;=&nbsp;0xA2;<br /><br />sfr&nbsp;B&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xF0;<br />sfr&nbsp;BRGR0_0&nbsp;&nbsp;=&nbsp;0xBE;<br />sfr&nbsp;BRGR1_0&nbsp;&nbsp;=&nbsp;0xBF;<br />sfr&nbsp;BRGCON_0&nbsp;=&nbsp;0xBD;<br /><br />sfr&nbsp;CMP1&nbsp;&nbsp;&nbsp;=&nbsp;0xAC;<br />sfr&nbsp;CMP2&nbsp;&nbsp;&nbsp;=&nbsp;0xAD;<br /><br />sfr&nbsp;DIVM&nbsp;&nbsp;&nbsp;=&nbsp;0x95;<br />sfr&nbsp;DPH&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x83;<br />sfr&nbsp;DPL&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x82;<br />sfr&nbsp;FADRH&nbsp;&nbsp;=&nbsp;0xE7;<br />sfr&nbsp;FMADRL&nbsp;=&nbsp;0xE6;<br />sfr&nbsp;FMCON&nbsp;&nbsp;=&nbsp;0xE4;<br />sfr&nbsp;FMDATA&nbsp;=&nbsp;0xE5;<br /><br />sfr&nbsp;I2ADR&nbsp;&nbsp;=&nbsp;0xDB;<br />sfr&nbsp;I2CON&nbsp;&nbsp;=&nbsp;0xD8;<br />sfr&nbsp;I2DAT&nbsp;&nbsp;=&nbsp;0xDA;<br />sfr&nbsp;I2SCLH&nbsp;=&nbsp;0xDD;<br />sfr&nbsp;I2SCLL&nbsp;=&nbsp;0xDC;<br />sfr&nbsp;I2STAT&nbsp;=&nbsp;0xD9;<br /><br />sfr&nbsp;IEN0&nbsp;&nbsp;&nbsp;=&nbsp;0xA8;<br />sfr&nbsp;IEN1&nbsp;&nbsp;&nbsp;=&nbsp;0xE8;<br />sfr&nbsp;IEN2&nbsp;&nbsp;&nbsp;=&nbsp;0xD5;<br />sfr&nbsp;IP0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xB8;<br />sfr&nbsp;IP0H&nbsp;&nbsp;&nbsp;=&nbsp;0xB7;<br />sfr&nbsp;IP1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xF8;<br />sfr&nbsp;IP1H&nbsp;&nbsp;&nbsp;=&nbsp;0xF7;<br />sfr&nbsp;IP2&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xD6;<br />sfr&nbsp;IP2H&nbsp;&nbsp;&nbsp;=&nbsp;0xD7;<br /><br />sfr&nbsp;KBCON&nbsp;&nbsp;=&nbsp;0x94;<br />sfr&nbsp;KBMASK&nbsp;=&nbsp;0x86;<br />sfr&nbsp;KBPATN&nbsp;=&nbsp;0x93;<br /><br />sfr&nbsp;P0&nbsp;&nbsp;&nbsp;=&nbsp;0x80;<br />sfr&nbsp;P1&nbsp;&nbsp;&nbsp;=&nbsp;0x90;<br />sfr&nbsp;P2&nbsp;&nbsp;&nbsp;=&nbsp;0xA0;<br />sfr&nbsp;P3&nbsp;&nbsp;&nbsp;=&nbsp;0xB0;<br />sfr&nbsp;P4&nbsp;&nbsp;&nbsp;=&nbsp;0xB3;<br />sfr&nbsp;P5&nbsp;&nbsp;&nbsp;=&nbsp;0xB4;<br /><br /><br />sfr&nbsp;P0M1&nbsp;&nbsp;&nbsp;=&nbsp;0x84;<br />sfr&nbsp;P0M2&nbsp;&nbsp;&nbsp;=&nbsp;0x85;<br />sfr&nbsp;P1M1&nbsp;&nbsp;&nbsp;=&nbsp;0x91;<br />sfr&nbsp;P1M2&nbsp;&nbsp;&nbsp;=&nbsp;0x92;<br />sfr&nbsp;P2M1&nbsp;&nbsp;&nbsp;=&nbsp;0xA4;<br />sfr&nbsp;P2M2&nbsp;&nbsp;&nbsp;=&nbsp;0xA5;<br />sfr&nbsp;P3M1&nbsp;&nbsp;&nbsp;=&nbsp;0xB1;<br />sfr&nbsp;P3M2&nbsp;&nbsp;&nbsp;=&nbsp;0xB2;<br />sfr&nbsp;PCON&nbsp;&nbsp;&nbsp;=&nbsp;0x87;<br />sfr&nbsp;PCONA&nbsp;&nbsp;=&nbsp;0xB5;<br />sfr&nbsp;PSW&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xD0;<br />sfr&nbsp;PT0AD&nbsp;&nbsp;=&nbsp;0xF6;<br /><br />sfr&nbsp;RSTSRC&nbsp;=&nbsp;0xDF;<br />sfr&nbsp;RTCCON&nbsp;=&nbsp;0xD1;<br />sfr&nbsp;RTCH&nbsp;&nbsp;&nbsp;=&nbsp;0xD2;<br />sfr&nbsp;RTCL&nbsp;&nbsp;&nbsp;=&nbsp;0xD3;<br /><br />sfr&nbsp;S0ADDR&nbsp;&nbsp;=&nbsp;0xA9;<br />sfr&nbsp;S0ADEN&nbsp;&nbsp;=&nbsp;0xB9;<br />sfr&nbsp;S0BUF&nbsp;&nbsp;&nbsp;=&nbsp;0x99;<br />sfr&nbsp;S0CON&nbsp;&nbsp;&nbsp;=&nbsp;0x98;<br />sfr&nbsp;S0STAT&nbsp;&nbsp;=&nbsp;0xBA;<br />sfr&nbsp;SP&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x81;<br />sfr&nbsp;SPCTL&nbsp;&nbsp;&nbsp;=&nbsp;0xE2;<br />sfr&nbsp;SPSTAT&nbsp;&nbsp;=&nbsp;0xE1;<br />sfr&nbsp;SPDAT&nbsp;&nbsp;&nbsp;=&nbsp;0xE3;<br />sfr&nbsp;S1CON&nbsp;&nbsp;&nbsp;=&nbsp;0xB6;<br />sfr&nbsp;S1STAT&nbsp;&nbsp;=&nbsp;0xD4;<br /><br />sfr&nbsp;TAMOD&nbsp;&nbsp;=&nbsp;0x8F;<br />sfr&nbsp;TCON&nbsp;&nbsp;&nbsp;=&nbsp;0x88;<br />sfr&nbsp;TH0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8C;<br />sfr&nbsp;TH1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8D;<br />sfr&nbsp;TL0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8A;<br />sfr&nbsp;TL1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8B;<br />sfr&nbsp;TMOD&nbsp;&nbsp;&nbsp;=&nbsp;0x89;<br />sfr&nbsp;TRIM&nbsp;&nbsp;&nbsp;=&nbsp;0x96;<br /><br />sfr&nbsp;WDCON&nbsp;&nbsp;=&nbsp;0xA7;<br />sfr&nbsp;WDL&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xC1;<br />sfr&nbsp;WFEED1&nbsp;=&nbsp;0xC2;<br />sfr&nbsp;WFEED2&nbsp;=&nbsp;0xC3;<br /><br /><br />/*&nbsp;&nbsp;BIT&nbsp;Registers&nbsp;&nbsp;*/<br />/*&nbsp;&nbsp;PSW&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;CY&nbsp;&nbsp;&nbsp;=&nbsp;PSW^7;<br />sbit&nbsp;AC&nbsp;&nbsp;&nbsp;=&nbsp;PSW^6;<br />sbit&nbsp;F0&nbsp;&nbsp;&nbsp;=&nbsp;PSW^5;<br />sbit&nbsp;RS1&nbsp;&nbsp;=&nbsp;PSW^4;<br />sbit&nbsp;RS0&nbsp;&nbsp;=&nbsp;PSW^3;<br />sbit&nbsp;OV&nbsp;&nbsp;&nbsp;=&nbsp;PSW^2;<br />sbit&nbsp;F1&nbsp;&nbsp;&nbsp;=&nbsp;PSW^1;<br />sbit&nbsp;P&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;PSW^0;<br /><br />/*&nbsp;&nbsp;TCON&nbsp;&nbsp;*/<br />sbit&nbsp;TF1&nbsp;&nbsp;=&nbsp;TCON^7;<br />sbit&nbsp;TR1&nbsp;&nbsp;=&nbsp;TCON^6;<br />sbit&nbsp;TF0&nbsp;&nbsp;=&nbsp;TCON^5;<br />sbit&nbsp;TR0&nbsp;&nbsp;=&nbsp;TCON^4;<br />sbit&nbsp;IE1&nbsp;&nbsp;=&nbsp;TCON^3;<br />sbit&nbsp;IT1&nbsp;&nbsp;=&nbsp;TCON^2;<br />sbit&nbsp;IE0&nbsp;&nbsp;=&nbsp;TCON^1;<br />sbit&nbsp;IT0&nbsp;&nbsp;=&nbsp;TCON^0;<br /><br />/*&nbsp;&nbsp;IEN0&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;EA&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^7;<br />sbit&nbsp;EWDRT&nbsp;=&nbsp;IEN0^6;<br />sbit&nbsp;EBO&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^5;<br />sbit&nbsp;ES&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^4;&nbsp;//&nbsp;alternatively&nbsp;&quot;ESR&quot;<br />sbit&nbsp;ESR&nbsp;&nbsp;=&nbsp;IEN0^4;<br />sbit&nbsp;ET1&nbsp;&nbsp;=&nbsp;IEN0^3;<br />sbit&nbsp;EX1&nbsp;&nbsp;=&nbsp;IEN0^2;<br />sbit&nbsp;ET0&nbsp;&nbsp;=&nbsp;IEN0^1;<br />sbit&nbsp;EX0&nbsp;&nbsp;=&nbsp;IEN0^0;<br /><br />/*&nbsp;&nbsp;IEN1&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;EAD&nbsp;&nbsp;=&nbsp;IEN1^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;EIEE&quot;&nbsp;<br />sbit&nbsp;EIEE&nbsp;=&nbsp;IEN1^7;<br />sbit&nbsp;EST&nbsp;&nbsp;=&nbsp;IEN1^6;<br />sbit&nbsp;ECCU&nbsp;=&nbsp;IEN1^4;<br />sbit&nbsp;ESPI&nbsp;=&nbsp;IEN1^3;<br />sbit&nbsp;EC&nbsp;&nbsp;&nbsp;=&nbsp;IEN1^2;<br />sbit&nbsp;EKBI&nbsp;=&nbsp;IEN1^1;<br />sbit&nbsp;EI2C&nbsp;=&nbsp;IEN1^0;<br /><br />/*&nbsp;&nbsp;IP0&nbsp;&nbsp;&nbsp;*/&nbsp;<br />sbit&nbsp;PWDRT&nbsp;=&nbsp;IP0^6;<br />sbit&nbsp;PB0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^5;<br />sbit&nbsp;PS&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;IP0^4;&nbsp;//&nbsp;alternatively&nbsp;&quot;PSR&quot;<br />sbit&nbsp;PSR&nbsp;&nbsp;&nbsp;=&nbsp;IP0^4;<br />sbit&nbsp;PT1&nbsp;&nbsp;&nbsp;=&nbsp;IP0^3;<br />sbit&nbsp;PX1&nbsp;&nbsp;&nbsp;=&nbsp;IP0^2;<br />sbit&nbsp;PT0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^1;<br />sbit&nbsp;PX0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^0;<br /><br />/*&nbsp;&nbsp;IP1&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;PAD&nbsp;&nbsp;=&nbsp;IP1^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;PIEE&quot;&nbsp;<br />sbit&nbsp;PIEE&nbsp;=&nbsp;IP1^7;<br />sbit&nbsp;PST&nbsp;&nbsp;=&nbsp;IP1^6;<br />sbit&nbsp;PCCU&nbsp;=&nbsp;IP1^4;<br />sbit&nbsp;PSPI&nbsp;=&nbsp;IP1^3;<br />sbit&nbsp;PC_&nbsp;&nbsp;=&nbsp;IP1^2;<br />sbit&nbsp;PKBI&nbsp;=&nbsp;IP1^1;<br />sbit&nbsp;PI2C&nbsp;=&nbsp;IP1^0;<br /><br />/*&nbsp;&nbsp;S0CON&nbsp;&nbsp;*/<br />sbit&nbsp;SM0_0&nbsp;&nbsp;=&nbsp;S0CON^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;FE&quot;<br />sbit&nbsp;FE_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^7;<br />sbit&nbsp;SM1_0&nbsp;&nbsp;=&nbsp;S0CON^6;<br />sbit&nbsp;SM2_0&nbsp;&nbsp;=&nbsp;S0CON^5;<br />sbit&nbsp;REN_0&nbsp;&nbsp;=&nbsp;S0CON^4;<br />sbit&nbsp;TB8_0&nbsp;&nbsp;=&nbsp;S0CON^3;<br />sbit&nbsp;RB8_0&nbsp;&nbsp;=&nbsp;S0CON^2;<br />sbit&nbsp;TI_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^1;<br />sbit&nbsp;RI_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^0;<br /><br />/*&nbsp;&nbsp;S1CON&nbsp;&nbsp;*/<br />sbit&nbsp;SM0_1&nbsp;&nbsp;=&nbsp;S1CON^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;FE&quot;<br />sbit&nbsp;FE_1&nbsp;&nbsp;&nbsp;=&nbsp;S1CON^7;<br />sbit&nbsp;SM1_1&nbsp;&nbsp;=&nbsp;S1CON^6;<br />sbit&nbsp;SM2_1&nbsp;&nbsp;=&nbsp;S1CON^5;<br />sbit&nbsp;REN_1&nbsp;&nbsp;=&nbsp;S1CON^4;<br />sbit&nbsp;TB8_1&nbsp;&nbsp;=&nbsp;S1CON^3;<br />sbit&nbsp;RB8_1&nbsp;&nbsp;=&nbsp;S1CON^2;<br />sbit&nbsp;TI_1&nbsp;&nbsp;&nbsp;=&nbsp;S1CON^1;<br />sbit&nbsp;RI_1&nbsp;&nbsp;&nbsp;=&nbsp;S1CON^0;<br /><br />/*&nbsp;&nbsp;I2CON&nbsp;&nbsp;*/<br />sbit&nbsp;I2EN&nbsp;&nbsp;=&nbsp;I2CON^6;<br />sbit&nbsp;STA&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^5;<br />sbit&nbsp;STO&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^4;<br />sbit&nbsp;SI&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^3;<br />sbit&nbsp;AA&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^2;<br />sbit&nbsp;CRSEL&nbsp;=&nbsp;I2CON^0;<br /><br />/*&nbsp;&nbsp;P0&nbsp;&nbsp;*/<br />sbit&nbsp;KB7&nbsp;=&nbsp;P0^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;T1&quot;<br />sbit&nbsp;T1&nbsp;=&nbsp;P0^7;<br />sbit&nbsp;KB6&nbsp;=&nbsp;P0^6;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP1&quot;<br />//sbit&nbsp;CMP1&nbsp;=&nbsp;P0^6;<br />sbit&nbsp;KB5&nbsp;=&nbsp;P0^5;<br />sbit&nbsp;KB4&nbsp;=&nbsp;P0^4;<br />sbit&nbsp;KB3&nbsp;=&nbsp;P0^3;<br />sbit&nbsp;KB2&nbsp;=&nbsp;P0^2;<br />sbit&nbsp;KB1&nbsp;=&nbsp;P0^1;<br />sbit&nbsp;KB0&nbsp;=&nbsp;P0^0;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP2&quot;<br />//sbit&nbsp;CMP2&nbsp;=&nbsp;P0^0;<br /><br /><br />/*&nbsp;&nbsp;P3&nbsp;&nbsp;*/<br />sbit&nbsp;XTAL1=&nbsp;P3^1;<br />sbit&nbsp;XTAL2=&nbsp;P3^0;<br /><br />/*&nbsp;TCR20&nbsp;*/<br />sbit&nbsp;PLLEN&nbsp;=&nbsp;TCR20^7;<br />sbit&nbsp;HLTRN&nbsp;=&nbsp;TCR20^6;<br />sbit&nbsp;HLTEN&nbsp;=&nbsp;TCR20^5;<br />sbit&nbsp;ALTCD&nbsp;=&nbsp;TCR20^4;<br />sbit&nbsp;ALTAB&nbsp;=&nbsp;TCR20^3;<br />sbit&nbsp;TDIR2&nbsp;=&nbsp;TCR20^2;<br />sbit&nbsp;TMOD21=&nbsp;TCR20^1;<br />sbit&nbsp;TMOD20=&nbsp;TCR20^0;<br /><br />/*&nbsp;ADMODA&nbsp;*/<br />sbit&nbsp;BNDI0&nbsp;&nbsp;=&nbsp;ADMODA^7;<br />sbit&nbsp;BURST0&nbsp;=&nbsp;ADMODA^6;<br />sbit&nbsp;SCC0&nbsp;&nbsp;&nbsp;=&nbsp;ADMODA^5;<br />sbit&nbsp;SCAN0&nbsp;&nbsp;=&nbsp;ADMODA^4;<br />#endif<br /><br />

对照数据手册，写出这样一个头文件没有任何难度，但寄存器太多，需要有足够的耐心。

  

楼上的，不知道用的是那个版本的？？<br />我装了两个一个是uvision27.5版本的，另外一个是uvision3，3.0版本的，只能在uvision3里面用，但是没有头文件。<br />我写的那个头文件是有问题的，每考虑周全，串口uart1是不能进行位操作的，只能进行字节操作，头文件更正如下<br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;//*******************************************************************************************<br /><br />/*--------------------------------------------------------------------------<br />REG952.H<br />Header&nbsp;file&nbsp;for&nbsp;Philips&nbsp;89LPC952<br /><br />--------------------------------------------------------------------------*/<br /><br />#ifndef&nbsp;__REG952_H__<br />#define&nbsp;__REG952_H__<br /><br />/*&nbsp;Include&nbsp;memory&nbsp;mapped&nbsp;SFRs&nbsp;*/<br />/*&nbsp;Analog&nbsp;Digital&nbsp;Converter&nbsp;0*/<br />#define&nbsp;ADC0HBND&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFEF))<br />#define&nbsp;ADC0LBND&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFEE))<br />#define&nbsp;AD0DAT0R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFE))<br />#define&nbsp;AD0DAT0L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFF))<br />#define&nbsp;AD0DAT1R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFC))<br />#define&nbsp;AD0DAT1L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFD))<br />#define&nbsp;AD0DAT2R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFA))<br />#define&nbsp;AD0DAT2L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFFB))<br />#define&nbsp;AD0DAT3R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF8))<br />#define&nbsp;AD0DAT3L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF9))<br />#define&nbsp;AD0DAT4R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF6))<br />#define&nbsp;AD0DAT4L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF7))<br />#define&nbsp;AD0DAT5R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF4))<br />#define&nbsp;AD0DAT5L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF5))<br />#define&nbsp;AD0DAT6R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF2))<br />#define&nbsp;AD0DAT6L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF3))<br />#define&nbsp;AD0DAT7R&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF0))<br />#define&nbsp;AD0DAT7L&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFF1))<br />#define&nbsp;BNDSTA0&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFED))<br /><br />#define&nbsp;BRGCON_1&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB3))<br />#define&nbsp;BRG0_1&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB4))<br />#define&nbsp;BRG1_1&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB5))<br />#define&nbsp;P4M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB8))<br />#define&nbsp;P4M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB9))<br />#define&nbsp;P5M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFBA))<br />#define&nbsp;P5M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFBB))<br />#define&nbsp;S1ADDR&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB2))<br />#define&nbsp;S1ADEN&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB1))<br />#define&nbsp;S1BUF&nbsp;&nbsp;&nbsp;&nbsp;(*((unsigned&nbsp;char&nbsp;volatile&nbsp;xdata*)0xFFB0))<br /><br /><br />/*&nbsp;&nbsp;BYTE&nbsp;Registers&nbsp;&nbsp;*/<br />sfr&nbsp;ACC&nbsp;&nbsp;=&nbsp;0xE0;<br />sfr&nbsp;AD0CON&nbsp;=&nbsp;0x97;<br />sfr&nbsp;AD0INS&nbsp;=&nbsp;0xA3;<br />sfr&nbsp;ADMODA&nbsp;=&nbsp;0xC0;<br />sfr&nbsp;ADMODB&nbsp;=&nbsp;0xA1;<br />sfr&nbsp;AUXR1&nbsp;&nbsp;=&nbsp;0xA2;<br /><br />sfr&nbsp;B&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xF0;<br />sfr&nbsp;BRGR0_0&nbsp;&nbsp;=&nbsp;0xBE;<br />sfr&nbsp;BRGR1_0&nbsp;&nbsp;=&nbsp;0xBF;<br />sfr&nbsp;BRGCON_0&nbsp;=&nbsp;0xBD;<br /><br />sfr&nbsp;CMP1&nbsp;&nbsp;&nbsp;=&nbsp;0xAC;<br />sfr&nbsp;CMP2&nbsp;&nbsp;&nbsp;=&nbsp;0xAD;<br /><br />sfr&nbsp;DIVM&nbsp;&nbsp;&nbsp;=&nbsp;0x95;<br />sfr&nbsp;DPH&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x83;<br />sfr&nbsp;DPL&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x82;<br />sfr&nbsp;FADRH&nbsp;&nbsp;=&nbsp;0xE7;<br />sfr&nbsp;FMADRL&nbsp;=&nbsp;0xE6;<br />sfr&nbsp;FMCON&nbsp;&nbsp;=&nbsp;0xE4;<br />sfr&nbsp;FMDATA&nbsp;=&nbsp;0xE5;<br /><br />sfr&nbsp;I2ADR&nbsp;&nbsp;=&nbsp;0xDB;<br />sfr&nbsp;I2CON&nbsp;&nbsp;=&nbsp;0xD8;<br />sfr&nbsp;I2DAT&nbsp;&nbsp;=&nbsp;0xDA;<br />sfr&nbsp;I2SCLH&nbsp;=&nbsp;0xDD;<br />sfr&nbsp;I2SCLL&nbsp;=&nbsp;0xDC;<br />sfr&nbsp;I2STAT&nbsp;=&nbsp;0xD9;<br /><br />sfr&nbsp;IEN0&nbsp;&nbsp;&nbsp;=&nbsp;0xA8;<br />sfr&nbsp;IEN1&nbsp;&nbsp;&nbsp;=&nbsp;0xE8;<br />sfr&nbsp;IEN2&nbsp;&nbsp;&nbsp;=&nbsp;0xD5;<br />sfr&nbsp;IP0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xB8;<br />sfr&nbsp;IP0H&nbsp;&nbsp;&nbsp;=&nbsp;0xB7;<br />sfr&nbsp;IP1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xF8;<br />sfr&nbsp;IP1H&nbsp;&nbsp;&nbsp;=&nbsp;0xF7;<br />sfr&nbsp;IP2&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xD6;<br />sfr&nbsp;IP2H&nbsp;&nbsp;&nbsp;=&nbsp;0xD7;<br /><br />sfr&nbsp;KBCON&nbsp;&nbsp;=&nbsp;0x94;<br />sfr&nbsp;KBMASK&nbsp;=&nbsp;0x86;<br />sfr&nbsp;KBPATN&nbsp;=&nbsp;0x93;<br /><br />sfr&nbsp;P0&nbsp;&nbsp;&nbsp;=&nbsp;0x80;<br />sfr&nbsp;P1&nbsp;&nbsp;&nbsp;=&nbsp;0x90;<br />sfr&nbsp;P2&nbsp;&nbsp;&nbsp;=&nbsp;0xA0;<br />sfr&nbsp;P3&nbsp;&nbsp;&nbsp;=&nbsp;0xB0;<br />sfr&nbsp;P4&nbsp;&nbsp;&nbsp;=&nbsp;0xB3;<br />sfr&nbsp;P5&nbsp;&nbsp;&nbsp;=&nbsp;0xB4;<br /><br /><br />sfr&nbsp;P0M1&nbsp;&nbsp;&nbsp;=&nbsp;0x84;<br />sfr&nbsp;P0M2&nbsp;&nbsp;&nbsp;=&nbsp;0x85;<br />sfr&nbsp;P1M1&nbsp;&nbsp;&nbsp;=&nbsp;0x91;<br />sfr&nbsp;P1M2&nbsp;&nbsp;&nbsp;=&nbsp;0x92;<br />sfr&nbsp;P2M1&nbsp;&nbsp;&nbsp;=&nbsp;0xA4;<br />sfr&nbsp;P2M2&nbsp;&nbsp;&nbsp;=&nbsp;0xA5;<br />sfr&nbsp;P3M1&nbsp;&nbsp;&nbsp;=&nbsp;0xB1;<br />sfr&nbsp;P3M2&nbsp;&nbsp;&nbsp;=&nbsp;0xB2;<br />sfr&nbsp;PCON&nbsp;&nbsp;&nbsp;=&nbsp;0x87;<br />sfr&nbsp;PCONA&nbsp;&nbsp;=&nbsp;0xB5;<br />sfr&nbsp;PSW&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xD0;<br />sfr&nbsp;PT0AD&nbsp;&nbsp;=&nbsp;0xF6;<br /><br />sfr&nbsp;RSTSRC&nbsp;=&nbsp;0xDF;<br />sfr&nbsp;RTCCON&nbsp;=&nbsp;0xD1;<br />sfr&nbsp;RTCH&nbsp;&nbsp;&nbsp;=&nbsp;0xD2;<br />sfr&nbsp;RTCL&nbsp;&nbsp;&nbsp;=&nbsp;0xD3;<br /><br />sfr&nbsp;S0ADDR&nbsp;&nbsp;=&nbsp;0xA9;<br />sfr&nbsp;S0ADEN&nbsp;&nbsp;=&nbsp;0xB9;<br />sfr&nbsp;S0BUF&nbsp;&nbsp;&nbsp;=&nbsp;0x99;<br />sfr&nbsp;S0CON&nbsp;&nbsp;&nbsp;=&nbsp;0x98;<br />sfr&nbsp;S0STAT&nbsp;&nbsp;=&nbsp;0xBA;<br />sfr&nbsp;SP&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x81;<br />sfr&nbsp;SPCTL&nbsp;&nbsp;&nbsp;=&nbsp;0xE2;<br />sfr&nbsp;SPSTAT&nbsp;&nbsp;=&nbsp;0xE1;<br />sfr&nbsp;SPDAT&nbsp;&nbsp;&nbsp;=&nbsp;0xE3;<br />sfr&nbsp;S1CON&nbsp;&nbsp;&nbsp;=&nbsp;0xB6;<br />sfr&nbsp;S1STAT&nbsp;&nbsp;=&nbsp;0xD4;<br /><br />sfr&nbsp;TAMOD&nbsp;&nbsp;=&nbsp;0x8F;<br />sfr&nbsp;TCON&nbsp;&nbsp;&nbsp;=&nbsp;0x88;<br />sfr&nbsp;TH0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8C;<br />sfr&nbsp;TH1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8D;<br />sfr&nbsp;TL0&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8A;<br />sfr&nbsp;TL1&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0x8B;<br />sfr&nbsp;TMOD&nbsp;&nbsp;&nbsp;=&nbsp;0x89;<br />sfr&nbsp;TRIM&nbsp;&nbsp;&nbsp;=&nbsp;0x96;<br /><br />sfr&nbsp;WDCON&nbsp;&nbsp;=&nbsp;0xA7;<br />sfr&nbsp;WDL&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;0xC1;<br />sfr&nbsp;WFEED1&nbsp;=&nbsp;0xC2;<br />sfr&nbsp;WFEED2&nbsp;=&nbsp;0xC3;<br /><br /><br />/*&nbsp;&nbsp;BIT&nbsp;Registers&nbsp;&nbsp;*/<br />/*&nbsp;&nbsp;PSW&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;CY&nbsp;&nbsp;&nbsp;=&nbsp;PSW^7;<br />sbit&nbsp;AC&nbsp;&nbsp;&nbsp;=&nbsp;PSW^6;<br />sbit&nbsp;F0&nbsp;&nbsp;&nbsp;=&nbsp;PSW^5;<br />sbit&nbsp;RS1&nbsp;&nbsp;=&nbsp;PSW^4;<br />sbit&nbsp;RS0&nbsp;&nbsp;=&nbsp;PSW^3;<br />sbit&nbsp;OV&nbsp;&nbsp;&nbsp;=&nbsp;PSW^2;<br />sbit&nbsp;F1&nbsp;&nbsp;&nbsp;=&nbsp;PSW^1;<br />sbit&nbsp;P&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;PSW^0;<br /><br />/*&nbsp;&nbsp;TCON&nbsp;&nbsp;*/<br />sbit&nbsp;TF1&nbsp;&nbsp;=&nbsp;TCON^7;<br />sbit&nbsp;TR1&nbsp;&nbsp;=&nbsp;TCON^6;<br />sbit&nbsp;TF0&nbsp;&nbsp;=&nbsp;TCON^5;<br />sbit&nbsp;TR0&nbsp;&nbsp;=&nbsp;TCON^4;<br />sbit&nbsp;IE1&nbsp;&nbsp;=&nbsp;TCON^3;<br />sbit&nbsp;IT1&nbsp;&nbsp;=&nbsp;TCON^2;<br />sbit&nbsp;IE0&nbsp;&nbsp;=&nbsp;TCON^1;<br />sbit&nbsp;IT0&nbsp;&nbsp;=&nbsp;TCON^0;<br /><br />/*&nbsp;&nbsp;IEN0&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;EA&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^7;<br />sbit&nbsp;EWDRT&nbsp;=&nbsp;IEN0^6;<br />sbit&nbsp;EBO&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^5;<br />sbit&nbsp;ES&nbsp;&nbsp;&nbsp;=&nbsp;IEN0^4;&nbsp;//&nbsp;alternatively&nbsp;&quot;ESR&quot;<br />sbit&nbsp;ESR&nbsp;&nbsp;=&nbsp;IEN0^4;<br />sbit&nbsp;ET1&nbsp;&nbsp;=&nbsp;IEN0^3;<br />sbit&nbsp;EX1&nbsp;&nbsp;=&nbsp;IEN0^2;<br />sbit&nbsp;ET0&nbsp;&nbsp;=&nbsp;IEN0^1;<br />sbit&nbsp;EX0&nbsp;&nbsp;=&nbsp;IEN0^0;<br /><br />/*&nbsp;&nbsp;IEN1&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;EAD&nbsp;&nbsp;=&nbsp;IEN1^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;EIEE&quot;&nbsp;<br />sbit&nbsp;EIEE&nbsp;=&nbsp;IEN1^7;<br />sbit&nbsp;EST&nbsp;&nbsp;=&nbsp;IEN1^6;<br />sbit&nbsp;ECCU&nbsp;=&nbsp;IEN1^4;<br />sbit&nbsp;ESPI&nbsp;=&nbsp;IEN1^3;<br />sbit&nbsp;EC&nbsp;&nbsp;&nbsp;=&nbsp;IEN1^2;<br />sbit&nbsp;EKBI&nbsp;=&nbsp;IEN1^1;<br />sbit&nbsp;EI2C&nbsp;=&nbsp;IEN1^0;<br /><br />/*&nbsp;&nbsp;IP0&nbsp;&nbsp;&nbsp;*/&nbsp;<br />sbit&nbsp;PWDRT&nbsp;=&nbsp;IP0^6;<br />sbit&nbsp;PB0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^5;<br />sbit&nbsp;PS&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;IP0^4;&nbsp;//&nbsp;alternatively&nbsp;&quot;PSR&quot;<br />sbit&nbsp;PSR&nbsp;&nbsp;&nbsp;=&nbsp;IP0^4;<br />sbit&nbsp;PT1&nbsp;&nbsp;&nbsp;=&nbsp;IP0^3;<br />sbit&nbsp;PX1&nbsp;&nbsp;&nbsp;=&nbsp;IP0^2;<br />sbit&nbsp;PT0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^1;<br />sbit&nbsp;PX0&nbsp;&nbsp;&nbsp;=&nbsp;IP0^0;<br /><br />/*&nbsp;&nbsp;IP1&nbsp;&nbsp;&nbsp;*/<br />sbit&nbsp;PAD&nbsp;&nbsp;=&nbsp;IP1^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;PIEE&quot;&nbsp;<br />sbit&nbsp;PIEE&nbsp;=&nbsp;IP1^7;<br />sbit&nbsp;PST&nbsp;&nbsp;=&nbsp;IP1^6;<br />sbit&nbsp;PCCU&nbsp;=&nbsp;IP1^4;<br />sbit&nbsp;PSPI&nbsp;=&nbsp;IP1^3;<br />sbit&nbsp;PC_&nbsp;&nbsp;=&nbsp;IP1^2;<br />sbit&nbsp;PKBI&nbsp;=&nbsp;IP1^1;<br />sbit&nbsp;PI2C&nbsp;=&nbsp;IP1^0;<br /><br />/*&nbsp;&nbsp;S0CON&nbsp;&nbsp;*/<br />sbit&nbsp;SM0_0&nbsp;&nbsp;=&nbsp;S0CON^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;FE&quot;<br />sbit&nbsp;FE_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^7;<br />sbit&nbsp;SM1_0&nbsp;&nbsp;=&nbsp;S0CON^6;<br />sbit&nbsp;SM2_0&nbsp;&nbsp;=&nbsp;S0CON^5;<br />sbit&nbsp;REN_0&nbsp;&nbsp;=&nbsp;S0CON^4;<br />sbit&nbsp;TB8_0&nbsp;&nbsp;=&nbsp;S0CON^3;<br />sbit&nbsp;RB8_0&nbsp;&nbsp;=&nbsp;S0CON^2;<br />sbit&nbsp;TI_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^1;<br />sbit&nbsp;RI_0&nbsp;&nbsp;&nbsp;=&nbsp;S0CON^0;<br /><br />/*&nbsp;&nbsp;I2CON&nbsp;&nbsp;*/<br />sbit&nbsp;I2EN&nbsp;&nbsp;=&nbsp;I2CON^6;<br />sbit&nbsp;STA&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^5;<br />sbit&nbsp;STO&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^4;<br />sbit&nbsp;SI&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^3;<br />sbit&nbsp;AA&nbsp;&nbsp;&nbsp;&nbsp;=&nbsp;I2CON^2;<br />sbit&nbsp;CRSEL&nbsp;=&nbsp;I2CON^0;<br /><br />/*&nbsp;&nbsp;P0&nbsp;&nbsp;*/<br />sbit&nbsp;KB7&nbsp;=&nbsp;P0^7;&nbsp;//&nbsp;alternatively&nbsp;&quot;T1&quot;<br />sbit&nbsp;T1&nbsp;=&nbsp;P0^7;<br />sbit&nbsp;KB6&nbsp;=&nbsp;P0^6;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP1&quot;<br />//sbit&nbsp;CMP1&nbsp;=&nbsp;P0^6;<br />sbit&nbsp;KB5&nbsp;=&nbsp;P0^5;<br />sbit&nbsp;KB4&nbsp;=&nbsp;P0^4;<br />sbit&nbsp;KB3&nbsp;=&nbsp;P0^3;<br />sbit&nbsp;KB2&nbsp;=&nbsp;P0^2;<br />sbit&nbsp;KB1&nbsp;=&nbsp;P0^1;<br />sbit&nbsp;KB0&nbsp;=&nbsp;P0^0;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP2&quot;<br />//sbit&nbsp;CMP2&nbsp;=&nbsp;P0^0;<br /><br /><br />/*&nbsp;&nbsp;P3&nbsp;&nbsp;*/<br />sbit&nbsp;XTAL1=&nbsp;P3^1;<br />sbit&nbsp;XTAL2=&nbsp;P3^0;<br /><br /><br /><br />/*&nbsp;ADMODA&nbsp;*/<br />sbit&nbsp;BNDI0&nbsp;&nbsp;=&nbsp;ADMODA^7;<br />sbit&nbsp;BURST0&nbsp;=&nbsp;ADMODA^6;<br />sbit&nbsp;SCC0&nbsp;&nbsp;&nbsp;=&nbsp;ADMODA^5;<br />sbit&nbsp;SCAN0&nbsp;&nbsp;=&nbsp;ADMODA^4;<br />#endif<br /><br />

;-------------------------------------------------------------------------------<br />;&nbsp;P89LPC952&nbsp;Processor&nbsp;Declarations<br />;<br />;&nbsp;WRITED&nbsp;&nbsp;BY&nbsp;&nbsp;&nbsp;WangJiading&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;2007.6.10<br />;-------------------------------------------------------------------------------<br />$SAVE<br />$NOLIST<br />;/*&nbsp;Include&nbsp;memory&nbsp;mapped&nbsp;SFRs&nbsp;*/<br />;/*&nbsp;Analog&nbsp;Digital&nbsp;Converter&nbsp;0*/<br />ADC0HBND&nbsp;DATA&nbsp;0xFFEF&nbsp;&nbsp;&nbsp;&nbsp;;ADC0高_边界寄存器，左(MSB)<br />ADC0LBND&nbsp;DATA&nbsp;0xFFEE&nbsp;&nbsp;&nbsp;&nbsp;;ADC0低_边界寄存器(MSB)<br />AD0DAT0R&nbsp;DATA&nbsp;0xFFFE&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器0，右(MSB)<br />AD0DAT0L&nbsp;DATA&nbsp;0xFFFF&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器0，左(MSB)<br />AD0DAT1R&nbsp;DATA&nbsp;0xFFFC&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器1，右(MSB)<br />AD0DAT1L&nbsp;DATA&nbsp;0xFFFD&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器1，左(MSB)<br />AD0DAT2R&nbsp;DATA&nbsp;0xFFFA&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器2，右(MSB)<br />AD0DAT2L&nbsp;DATA&nbsp;0xFFFB&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器2，左(MSB)<br />AD0DAT3R&nbsp;DATA&nbsp;0xFFF8&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器3，右(MSB)<br />AD0DAT3L&nbsp;DATA&nbsp;0xFFF9&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器3，左(MSB)<br />AD0DAT4R&nbsp;DATA&nbsp;0xFFF6&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器4，右(MSB)<br />AD0DAT4L&nbsp;DATA&nbsp;0xFFF7&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器4，左(MSB)<br />AD0DAT5R&nbsp;DATA&nbsp;0xFFF4&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器5，右(MSB)<br />AD0DAT5L&nbsp;DATA&nbsp;0xFFF5&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器5，左(MSB)<br />AD0DAT6R&nbsp;DATA&nbsp;0xFFF2&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器6，右(MSB)<br />AD0DAT6L&nbsp;DATA&nbsp;0xFFF3&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器6，左(MSB)<br />AD0DAT7R&nbsp;DATA&nbsp;0xFFF0&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器7，右(MSB)<br />AD0DAT7L&nbsp;DATA&nbsp;0xFFF1&nbsp;&nbsp;&nbsp;&nbsp;;ADC0数据寄存器7，左(MSB)<br />BNDSTA0&nbsp;&nbsp;DATA&nbsp;0xFFED&nbsp;&nbsp;&nbsp;&nbsp;;ADC0边界状态寄存器<br />BRGCON_1&nbsp;DATA&nbsp;0xFFB3&nbsp;&nbsp;&nbsp;&nbsp;;波特率发生器1控制寄存器<br />BRG0_1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB4&nbsp;&nbsp;&nbsp;&nbsp;;波特率发生器1低字节<br />BRG1_1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB5&nbsp;&nbsp;&nbsp;&nbsp;;波特率发生器1高字节<br /><br />;/*&nbsp;Port&nbsp;4/5&nbsp;Configuration&nbsp;*/<br />P4M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB8&nbsp;&nbsp;&nbsp;&nbsp;;P4输出模式1<br />P4M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB9&nbsp;&nbsp;&nbsp;&nbsp;;P4输出模式2<br />P5M1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFBA&nbsp;&nbsp;&nbsp;&nbsp;;P5输出模式1<br />P5M2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFBB&nbsp;&nbsp;&nbsp;&nbsp;;P5输出模式2<br /><br />;/*&nbsp;Serial&nbsp;1&nbsp;Configuration&nbsp;*/<br />S1ADDR&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB2&nbsp;&nbsp;&nbsp;&nbsp;;串口1地址寄存器<br />S1ADEN&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB1&nbsp;&nbsp;&nbsp;&nbsp;;串口1地址使能寄存器<br />S1BUF&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xFFB0&nbsp;&nbsp;&nbsp;&nbsp;;串口1数据缓冲器寄存器<br /><br />;/*&nbsp;&nbsp;BYTE&nbsp;Registers&nbsp;&nbsp;*/<br />P0&nbsp;&nbsp;&nbsp;DATA&nbsp;0x80;<br />P1&nbsp;&nbsp;&nbsp;DATA&nbsp;0x90;<br />P2&nbsp;&nbsp;&nbsp;DATA&nbsp;0xA0;<br />P3&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB0;<br />P4&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB3;<br />P5&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB4;<br /><br />PSW&nbsp;&nbsp;DATA&nbsp;0xD0;<br />ACC&nbsp;&nbsp;DATA&nbsp;0xE0;<br />B&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xF0;<br />SP&nbsp;&nbsp;&nbsp;DATA&nbsp;0x81;<br />DPL&nbsp;&nbsp;DATA&nbsp;0x82;<br />DPH&nbsp;&nbsp;DATA&nbsp;0x83;<br />PCON&nbsp;DATA&nbsp;0x87;<br />TCON&nbsp;DATA&nbsp;0x88;<br />TMOD&nbsp;DATA&nbsp;0x89;<br />TL0&nbsp;&nbsp;DATA&nbsp;0x8A;<br />TL1&nbsp;&nbsp;DATA&nbsp;0x8B;<br />TH0&nbsp;&nbsp;DATA&nbsp;0x8C;<br />TH1&nbsp;&nbsp;DATA&nbsp;0x8D;<br />IEN0&nbsp;DATA&nbsp;0xA8;<br />IP0&nbsp;&nbsp;DATA&nbsp;0xB8;<br />S0CON&nbsp;DATA&nbsp;0x98;<br />S0BUF&nbsp;DATA&nbsp;0x99;<br /><br />AD0CON&nbsp;DATA&nbsp;0x97;<br />AD0INS&nbsp;DATA&nbsp;0xA3;<br />AD0MODA&nbsp;DATA&nbsp;0xC0;<br />AD0MODB&nbsp;DATA&nbsp;0xA1;<br /><br />AUXR1&nbsp;&nbsp;DATA&nbsp;0xA2;<br />S0ADDR&nbsp;DATA&nbsp;0xA9;<br />S0ADEN&nbsp;DATA&nbsp;0xB9;<br />BRGR0_0&nbsp;&nbsp;DATA&nbsp;0xBE;<br />BRGR1_0&nbsp;&nbsp;DATA&nbsp;0xBF;<br />BRGCON_0&nbsp;DATA&nbsp;0xBD;<br />CMP1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xAC;<br />CMP2&nbsp;&nbsp;&nbsp;DATA&nbsp;0xAD;<br /><br />DIVM&nbsp;&nbsp;&nbsp;DATA&nbsp;0x95;<br />FMADRH&nbsp;DATA&nbsp;0xE7;<br />FMADRL&nbsp;DATA&nbsp;0xE6;<br />FMCON&nbsp;&nbsp;DATA&nbsp;0xE4;<br />FMDATA&nbsp;DATA&nbsp;0xE5;<br />I2ADR&nbsp;&nbsp;DATA&nbsp;0xDB;<br />I2CON&nbsp;&nbsp;DATA&nbsp;0xD8;<br />I2DAT&nbsp;&nbsp;DATA&nbsp;0xDA;<br />I2SCLH&nbsp;DATA&nbsp;0xDD;<br />I2SCLL&nbsp;DATA&nbsp;0xDC;<br />I2STAT&nbsp;DATA&nbsp;0xD9;<br />IEN1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xE8;<br />IEN2&nbsp;&nbsp;&nbsp;DATA&nbsp;0xD5;<br />IP1&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xF8;<br />IP1H&nbsp;&nbsp;&nbsp;DATA&nbsp;0xF7;<br />IP2&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xD6;<br />IP2H&nbsp;&nbsp;&nbsp;DATA&nbsp;0xD7;<br />KBCON&nbsp;&nbsp;DATA&nbsp;0x94;<br />KBMASK&nbsp;DATA&nbsp;0x86;<br />KBPATN&nbsp;DATA&nbsp;0x93;<br /><br />P0M1&nbsp;&nbsp;&nbsp;DATA&nbsp;0x84;<br />P0M2&nbsp;&nbsp;&nbsp;DATA&nbsp;0x85;<br />P1M1&nbsp;&nbsp;&nbsp;DATA&nbsp;0x91;<br />P1M2&nbsp;&nbsp;&nbsp;DATA&nbsp;0x92;<br />P2M1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xA4;<br />P2M2&nbsp;&nbsp;&nbsp;DATA&nbsp;0xA5;<br />P3M1&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB1;<br />P3M2&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB2;<br />PCONA&nbsp;&nbsp;DATA&nbsp;0xB5;<br />PT0AD&nbsp;&nbsp;DATA&nbsp;0xF6;<br />RSTSRC&nbsp;DATA&nbsp;0xDF;<br />RTCCON&nbsp;DATA&nbsp;0xD1;<br />RTCH&nbsp;&nbsp;&nbsp;DATA&nbsp;0xD2;<br />RTCL&nbsp;&nbsp;&nbsp;DATA&nbsp;0xD3;<br />S0STAT&nbsp;DATA&nbsp;0xBA;<br />SPCTL&nbsp;&nbsp;DATA&nbsp;0xE2;<br />SPSTAT&nbsp;DATA&nbsp;0xE1;<br />SPDAT&nbsp;&nbsp;DATA&nbsp;0xE3;<br />S1CON&nbsp;&nbsp;DATA&nbsp;0xB6;<br />S1STAT&nbsp;DATA&nbsp;0xD4;<br />TAMOD&nbsp;&nbsp;DATA&nbsp;0x8F;<br /><br />TRIM&nbsp;&nbsp;&nbsp;DATA&nbsp;0x96;<br />WDCON&nbsp;&nbsp;DATA&nbsp;0xA7;<br />WDL&nbsp;&nbsp;&nbsp;&nbsp;DATA&nbsp;0xC1;<br />WFEED1&nbsp;DATA&nbsp;0xC2;<br />WFEED2&nbsp;DATA&nbsp;0xC3;<br />IP0H&nbsp;&nbsp;&nbsp;DATA&nbsp;0xB7;<br /><br />;/*&nbsp;&nbsp;BIT&nbsp;Registers&nbsp;&nbsp;*/<br />;/*&nbsp;&nbsp;PSW&nbsp;&nbsp;&nbsp;*/<br />CY&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.7;<br />AC&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.6;<br />F0&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.5;<br />RS1&nbsp;&nbsp;BIT&nbsp;PSW.4;<br />RS0&nbsp;&nbsp;BIT&nbsp;PSW.3;<br />OV&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.2;<br />F1&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.1;<br />P&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;PSW.0;<br /><br />;/*&nbsp;&nbsp;TCON&nbsp;&nbsp;*/<br />TF1&nbsp;&nbsp;BIT&nbsp;TCON.7;<br />TR1&nbsp;&nbsp;BIT&nbsp;TCON.6;<br />TF0&nbsp;&nbsp;BIT&nbsp;TCON.5;<br />TR0&nbsp;&nbsp;BIT&nbsp;TCON.4;<br />IE1&nbsp;&nbsp;BIT&nbsp;TCON.3;<br />IT1&nbsp;&nbsp;BIT&nbsp;TCON.2;<br />IE0&nbsp;&nbsp;BIT&nbsp;TCON.1;<br />IT0&nbsp;&nbsp;BIT&nbsp;TCON.0;<br /><br />;/*&nbsp;&nbsp;IEN0&nbsp;&nbsp;&nbsp;*/<br />EA&nbsp;&nbsp;&nbsp;BIT&nbsp;IEN0.7;<br />EWDRT&nbsp;BIT&nbsp;IEN0.6;<br />EBO&nbsp;&nbsp;&nbsp;BIT&nbsp;IEN0.5;<br />ES&nbsp;&nbsp;&nbsp;BIT&nbsp;IEN0.4;&nbsp;//&nbsp;alternatively&nbsp;&quot;ESR&quot;<br />ESR&nbsp;&nbsp;BIT&nbsp;IEN0.4;<br />ET1&nbsp;&nbsp;BIT&nbsp;IEN0.3;<br />EX1&nbsp;&nbsp;BIT&nbsp;IEN0.2;<br />ET0&nbsp;&nbsp;BIT&nbsp;IEN0.1;<br />EX0&nbsp;&nbsp;BIT&nbsp;IEN0.0;<br /><br />;/*&nbsp;&nbsp;IEN1&nbsp;&nbsp;&nbsp;*/<br />EAD&nbsp;&nbsp;BIT&nbsp;IEN1.7;&nbsp;//&nbsp;alternatively&nbsp;&quot;EIEE&quot;&nbsp;<br />EIEE&nbsp;BIT&nbsp;IEN1.7;<br />EST&nbsp;&nbsp;BIT&nbsp;IEN1.6;<br />ECCU&nbsp;BIT&nbsp;IEN1.4;<br />ESPI&nbsp;BIT&nbsp;IEN1.3;<br />EC&nbsp;&nbsp;&nbsp;BIT&nbsp;IEN1.2;<br />EKBI&nbsp;BIT&nbsp;IEN1.1;<br />EI2C&nbsp;BIT&nbsp;IEN1.0;<br /><br />;/*&nbsp;&nbsp;IP0&nbsp;&nbsp;&nbsp;*/&nbsp;<br />PWDRT&nbsp;BIT&nbsp;IP0.6;<br />PB0&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.5;<br />PS&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.4;&nbsp;//&nbsp;alternatively&nbsp;&quot;PSR&quot;<br />PSR&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.4;<br />PT1&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.3;<br />PX1&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.2;<br />PT0&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.1;<br />PX0&nbsp;&nbsp;&nbsp;BIT&nbsp;IP0.0;<br /><br />;/*&nbsp;&nbsp;IP1&nbsp;&nbsp;&nbsp;*/<br />PAD&nbsp;&nbsp;BIT&nbsp;IP1.7;&nbsp;//&nbsp;alternatively&nbsp;&quot;PIEE&quot;&nbsp;<br />PIEE&nbsp;BIT&nbsp;IP1.7;<br />PST&nbsp;&nbsp;BIT&nbsp;IP1.6;<br />PCCU&nbsp;BIT&nbsp;IP1.4;<br />PSPI&nbsp;BIT&nbsp;IP1.3;<br />PC_&nbsp;&nbsp;BIT&nbsp;IP1.2;<br />PKBI&nbsp;BIT&nbsp;IP1.1;<br />PI2C&nbsp;BIT&nbsp;IP1.0;<br /><br />;/*&nbsp;&nbsp;S0CON&nbsp;&nbsp;*/串口0控制寄存器，地址：98H<br />SM0_0&nbsp;&nbsp;BIT&nbsp;S0CON.7;该位的用途由PCON寄存器中的SMOD0决定&nbsp;//&nbsp;alternatively&nbsp;&quot;FE&quot;<br />FE_0&nbsp;&nbsp;&nbsp;BIT&nbsp;S0CON.7;alternatively&nbsp;&quot;FE&quot;<br />SM1_0&nbsp;&nbsp;BIT&nbsp;S0CON.6;和SM0_0定义串行口操作模式<br />SM2_0&nbsp;&nbsp;BIT&nbsp;S0CON.5;使能模式2和3中的多机通信功能<br />REN_0&nbsp;&nbsp;BIT&nbsp;S0CON.4;使能串行接受<br />TB8_0&nbsp;&nbsp;BIT&nbsp;S0CON.3;模式2和3中将要发送的第9位数据<br />RB8_0&nbsp;&nbsp;BIT&nbsp;S0CON.2;模式2和3中，该位为接受到的第9位数据<br />TI_0&nbsp;&nbsp;&nbsp;BIT&nbsp;S0CON.1;发送中断标志0<br />RI_0&nbsp;&nbsp;&nbsp;BIT&nbsp;S0CON.0;接收中断标志0<br /><br />;/*&nbsp;&nbsp;S1CON各位屏蔽字&nbsp;&nbsp;*/串口1控制寄存器，地址：0B6H<br />SM0_1_MSK&nbsp;&nbsp;DATA&nbsp;0x80;&nbsp;&nbsp;//&nbsp;alternatively&nbsp;&quot;FE&quot;<br />FE_1_MSK&nbsp;&nbsp;&nbsp;DATA&nbsp;0x80<br />SM1_1_MSK&nbsp;&nbsp;DATA&nbsp;0x40<br />SM2_1_MSK&nbsp;&nbsp;DATA&nbsp;0x20<br />REN_1_MSK&nbsp;&nbsp;DATA&nbsp;0x10<br />TB8_1_MSK&nbsp;&nbsp;DATA&nbsp;0x08<br />RB8_1_MSK&nbsp;&nbsp;DATA&nbsp;0x04<br />TI_1_MSK&nbsp;&nbsp;&nbsp;DATA&nbsp;0x02<br />RI_1_MSK&nbsp;&nbsp;&nbsp;DATA&nbsp;0x01<br /><br /><br />;/*&nbsp;&nbsp;I2CON&nbsp;&nbsp;*/I2C控制寄存器，地址：0D8H<br />I2EN&nbsp;&nbsp;BIT&nbsp;I2CON.6;I2C接口使能<br />STA&nbsp;&nbsp;&nbsp;BIT&nbsp;I2CON.5;起始标志<br />STO&nbsp;&nbsp;&nbsp;BIT&nbsp;I2CON.4;停止标志<br />SI&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;I2CON.3;I2C中断标志<br />AA&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;I2CON.2;发送应答标志<br />CRSEL&nbsp;BIT&nbsp;I2CON.0;SCL时钟选择<br /><br />;/*&nbsp;&nbsp;P0&nbsp;&nbsp;*/<br />KB7&nbsp;BIT&nbsp;P0.7;&nbsp;//&nbsp;alternatively&nbsp;&quot;T1&quot;<br />T1&nbsp;&nbsp;BIT&nbsp;P0.7;<br />KB6&nbsp;BIT&nbsp;P0.6;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP1&quot;;CMP1&nbsp;DATA&nbsp;P0.6;<br />KB5&nbsp;BIT&nbsp;P0.5;<br />KB4&nbsp;BIT&nbsp;P0.4;<br />KB3&nbsp;BIT&nbsp;P0.3;<br />KB2&nbsp;BIT&nbsp;P0.2;<br />KB1&nbsp;BIT&nbsp;P0.1;<br />KB0&nbsp;BIT&nbsp;P0.0;&nbsp;//&nbsp;alternatively&nbsp;&quot;CMP2&quot;//CMP2&nbsp;DATA&nbsp;P0.0;<br /><br />;/*&nbsp;&nbsp;P1&nbsp;&nbsp;*/<br />OCC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.7;<br />OCB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.6;<br />RST&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.5;<br />INT1&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.4;<br />;INT0&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.3;&nbsp;//&nbsp;alternatively&nbsp;&quot;SDA&quot;<br />;SDA&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.3;<br />;T0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.2;&nbsp;//&nbsp;alternatively&nbsp;&quot;SCL&quot;<br />;SCL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.2;<br />RxD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.1;<br />TxD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P1.0;<br /><br />;/*&nbsp;&nbsp;P2&nbsp;&nbsp;*/<br />ICA&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.7;<br />OCA&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.6;<br />SPICLK&nbsp;&nbsp;BIT&nbsp;P2.5;<br />SS&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.4;<br />MISO&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.3;<br />MOSI&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.2;<br />OCD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.1;<br />ICB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BIT&nbsp;P2.0;<br /><br />;/*&nbsp;&nbsp;P3&nbsp;&nbsp;*/<br />XTAL1&nbsp;BIT&nbsp;P3.1;<br />XTAL2&nbsp;BIT&nbsp;P3.0;<br /><br />;/*&nbsp;ADMODA&nbsp;*/<br />BNDI0&nbsp;&nbsp;BIT&nbsp;AD0MODA.7;<br />BURST0&nbsp;BIT&nbsp;AD0MODA.6;<br />SCC0&nbsp;&nbsp;&nbsp;BIT&nbsp;AD0MODA.5;<br />SCAN0&nbsp;&nbsp;BIT&nbsp;AD0MODA.4;<br /><br />$RESTORE